R
Ryan Fong
Guest
Fellow comp.arch.fpga users,
I'm trying to obtain information die sizes for various Xilinx FPGAs in the
Virtex, Virtex-II Pro, Virtex-II, and Spartan-III families. I am using this
information in my Master's thesis to approximate the physical lengths of
long wires, and how they have been scaling with delay. Any pointers will
help. Thanks.
-Ryan
I'm trying to obtain information die sizes for various Xilinx FPGAs in the
Virtex, Virtex-II Pro, Virtex-II, and Spartan-III families. I am using this
information in my Master's thesis to approximate the physical lengths of
long wires, and how they have been scaling with delay. Any pointers will
help. Thanks.
-Ryan