C
Clark Pope
Guest
We have a position open for an FPGA designer familiar with Xilinx ISE,
V2Pro,
Matlab, Digital Communications, and Decoders. We are about to start a major
development that requires convolutional, block, and turbo decoders along
with
framing, derandomization, and bit filtering functions. The design will be
very complex and challenging. The candidate must be familiar with generating
coded test files and measuring the resulting BER to validate their decoder
design.
The ideal candidate is someone who has already implemented these functions
in
a previous product or specializes as a consultant. The job can be about 6
month contract or a permanent hire based on mutual interest. Either way,
expenses and/or relocation costs would be covered. (Potentially, the
candidate could work remotely with heavy supervision.)
The job may start as soon as February.
U.S. Citizen Required.
Please send credentials to me and I will provide further detail to qualified
candidates.
V2Pro,
Matlab, Digital Communications, and Decoders. We are about to start a major
development that requires convolutional, block, and turbo decoders along
with
framing, derandomization, and bit filtering functions. The design will be
very complex and challenging. The candidate must be familiar with generating
coded test files and measuring the resulting BER to validate their decoder
design.
The ideal candidate is someone who has already implemented these functions
in
a previous product or specializes as a consultant. The job can be about 6
month contract or a permanent hire based on mutual interest. Either way,
expenses and/or relocation costs would be covered. (Potentially, the
candidate could work remotely with heavy supervision.)
The job may start as soon as February.
U.S. Citizen Required.
Please send credentials to me and I will provide further detail to qualified
candidates.