A
andre
Guest
I have 5.1 ISE WebPACK running under wine but just discivered it doesn't
support Spartan3. From the archives I read about some difficulties
regarding 6.2 ISE running on wine, have these been solved?
http://www.fpga-faq.com/archives/70825.html
I urgently need to know if 6.2 ISE works under wine as I have just
ordered the $99 Spartan-3 Starter Kit. If not I shall need to cancel my
order.
For those who haven't seen the Spartan 3 Kit:
http://www.xilinx.com/products/spartan3/s3boards.htm
Looks like a superb bit of kit, I will be buying a number of these for
my University module. Having the RAM on board is great. The applications
I have already thought about - add an ADC and you have a digital storage
scope, Turbo decoder, LDPC codes and so on. We'll need to get the ISE
6.2 WebPACK running on Linux and write our own programmer software. Does
anyone know of any Linux JTAG programming software suitable for the
Spartan? Or details of the protocol for programming the FPGA? I guess I
don't need to know the details of the bitstream, but I need to know how
the bitstream is inserted into the JTAG data.
At the moment my biggest hurdle (after learning VHDL!) will be getting
6.2 WebPACK running on wine.
Regards
Andrew
support Spartan3. From the archives I read about some difficulties
regarding 6.2 ISE running on wine, have these been solved?
http://www.fpga-faq.com/archives/70825.html
I urgently need to know if 6.2 ISE works under wine as I have just
ordered the $99 Spartan-3 Starter Kit. If not I shall need to cancel my
order.
For those who haven't seen the Spartan 3 Kit:
http://www.xilinx.com/products/spartan3/s3boards.htm
Looks like a superb bit of kit, I will be buying a number of these for
my University module. Having the RAM on board is great. The applications
I have already thought about - add an ADC and you have a digital storage
scope, Turbo decoder, LDPC codes and so on. We'll need to get the ISE
6.2 WebPACK running on Linux and write our own programmer software. Does
anyone know of any Linux JTAG programming software suitable for the
Spartan? Or details of the protocol for programming the FPGA? I guess I
don't need to know the details of the bitstream, but I need to know how
the bitstream is inserted into the JTAG data.
At the moment my biggest hurdle (after learning VHDL!) will be getting
6.2 WebPACK running on wine.
Regards
Andrew