Writing synthesizable Test bench code for Board testing

V

Vijesh

Guest
Hi all,

I am stuck with a problem, I have been working on SATA HOST core
development, now i want to develope a test file that i could download
to a board and test the core, this requires my test file to be
synthesized and i am not getting any idea on this...

Basically I will need to generate some mechanism that will help me to
send the FIS(Frame Information Structure), from the DUT. During
functinal testing, i have been doing this with the help of tb_top file,
where i have a CNTRL signal that helps me do this, but now i am not
getting how to do this on Board level.

If any one is got an idea, it would be of great help
 

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