Write the VGA Screen.

[Denisson]

Hi everyone,

I request some help about how to show information from FPGA Xilinx to
VGA Monitor. In fact I don't have any idea how to do this, and I'd
like some good paper to start this project. Specifically I'm writing
in Verilog a simple game similar to the first table tenis games and I
need to show this game in the screen

Thanks in advance,

Denisson

 

[glen herrmannsfeldt]

Denisson <denissoncs@gmail.com> wrote:

I request some help about how to show information from FPGA Xilinx to
VGA Monitor. In fact I don't have any idea how to do this, and I'd
like some good paper to start this project. Specifically I'm writing
in Verilog a simple game similar to the first table tenis games and I
need to show this game in the screen

The process is the same as for any display system, but
the timing is different. The basic process is to have a region
of memory to be displayed, have counters to go through the rows
and columns of the display, fetch the appropriate byte(s), and
send the output out. Also, to generate the required sync signals
at the same time.

You might find the schematic of the Apple II, which generates
an NTSC display, online. There is even the AppleFPGA project,
so it should exist already in HDL form.

Then change the timing for VGA, and output three bits instead of
the funny fake NTSC subcarrier that Apple does.

-- glen

 

[John_H]

On May 20, 9:02 pm, Denisson <denisso...@gmail.com> wrote:

Hi everyone,

I request some help about how to show information from FPGA Xilinx to
VGA Monitor. In fact I don't have any idea how to do this, and I'd
like some good paper to start this project. Specifically I'm writing
in Verilog a simple game similar to the first table tenis games and I
need to show this game in the screen

Thanks in advance,

Denisson

See pages 21-25 of http://www.xilinx.com/support/documentation/boards_and_kits/ug130.pdf

 

[gabor]

On May 20, 10:16 pm, glen herrmannsfeldt <g...@ugcs.caltech.edu>
wrote:

Denisson <denisso...@gmail.com> wrote:
I request some help about how to show information from FPGA Xilinx to
VGA Monitor. In fact I don't have any idea how to do this, and I'd
like some good paper to start this project. Specifically I'm writing
in Verilog a simple game similar to the first table tenis games and I
need to show this game in the screen

The process is the same as for any display system, but
the timing is different.  The basic process is to have a region
of memory to be displayed, have counters to go through the rows
and columns of the display, fetch the appropriate byte(s), and
send the output out.  Also, to generate the required sync signals
at the same time.

You might find the schematic of the Apple II, which generates
an NTSC display, online.  There is even the AppleFPGA project,
so it should exist already in HDL form.

Then change the timing for VGA, and output three bits instead of
the funny fake NTSC subcarrier that Apple does.

-- glen

If you want to have standard VGA timing (pixels per line, clocks
per line period, blanking, sync, etc.) and don't want to pony up
for the VESA standard, chick out this "Video Timing Calculator"

http://www.epanorama.net/faq/vga2rgb/calc.html

Regards,
Gabor

 

[Denisson]

Hi, thanks for the help, but I'm still trying to make this work I
request more help if possible.

Ok, I have this code: http://dl.dropbox.com/u/8213309/vga_test.v

But It really doesn't work. The monitor shows nothing. I'm using a
Philips CRT monitor.

I found a book that says that the parameters can change for diferent
monitor brands. How can I now what's the specific parameters I have to
use for my specific brand?

I assumed:

Pixel rate: 25M pixels/second
Resolution: 640 / 480
Refresh rate: 60 hz


640; horizontal display area
48; horizontal front (left) border
16; horizontal back (right) border
96; horizontal retrace
480; vertical display area
10; vertical front (top) border
33; vertical back (bottom) border
2; vertical retrace


What about the new LCD monitors? The VGA pattern still works?

Thanks for helping,



Denisson


On May 21, 4:50 pm, gabor <ga...@alacron.com> wrote:

On May 20, 10:16 pm, glen herrmannsfeldt <g...@ugcs.caltech.edu
wrote:





Denisson <denisso...@gmail.com> wrote:
I request some help about how to show information from FPGA Xilinx to
VGA Monitor. In fact I don't have any idea how to do this, and I'd
like some good paper to start this project. Specifically I'm writing
in Verilog a simple game similar to the first table tenis games and I
need to show this game in the screen

The process is the same as for any display system, but
the timing is different.  The basic process is to have a region
of memory to be displayed, have counters to go through the rows
and columns of the display, fetch the appropriate byte(s), and
send the output out.  Also, to generate the required sync signals
at the same time.

You might find the schematic of the Apple II, which generates
an NTSC display, online.  There is even the AppleFPGA project,
so it should exist already in HDL form.

Then change the timing for VGA, and output three bits instead of
the funny fake NTSC subcarrier that Apple does.

-- glen

If you want to have standard VGA timing (pixels per line, clocks
per line period, blanking, sync, etc.) and don't want to pony up
for the VESA standard, chick out this "Video Timing Calculator"

http://www.epanorama.net/faq/vga2rgb/calc.html

Regards,
Gabor