Guest
I am using IBM9rf 90nm CMOS technology and trying to merge the shared
source of a common centroid interdigitated differential pair by hand.
But first of all, since there is a gate extension associated with each
MOS in IBM9rf, the gate A simply overlaps gate B (e.g. a differential
transistor pairs of A and B, with intedigitated layout like ABBA) when
I tried to merge the sources. Second, for a pair of transistor A and
B, the LVS only recognizes the whole layout as one single transistor
with m=1 and nf=4, instead of the four transistor with m=1 and nf=1
each. Anyone knows the problem?
Thanks.
Xiaochen
source of a common centroid interdigitated differential pair by hand.
But first of all, since there is a gate extension associated with each
MOS in IBM9rf, the gate A simply overlaps gate B (e.g. a differential
transistor pairs of A and B, with intedigitated layout like ABBA) when
I tried to merge the sources. Second, for a pair of transistor A and
B, the LVS only recognizes the whole layout as one single transistor
with m=1 and nf=4, instead of the four transistor with m=1 and nf=1
each. Anyone knows the problem?
Thanks.
Xiaochen