wish-list: separating parameter lists with semi-colon

[Robert Finch]

I'm converting some older Verilog code to the 2001 standard, and parameter
lists are driving me nuts.
Can a semi-colon please be allowed as a separater for parameter lists ?

I'd like to be able to code like the following (which is less of a pita for
conversion):
(the semi-colons are already present in pre-2001 code)

module addsub
#(parameter WID=32)
(
input op; // 0 = add, 1 = sub
input ci; // carry in (add: 1=carry; sub: 0=borrow)
input [WID:1] a, b; // operands input
output [WID:1] o; // result
output co; // carry out
output v; // overflow
);


Instead of having to manually change all of the semi-colons to commas as in
the following:

module addsub
#(parameter WID=32)
(
input op, // 0 = add, 1 = sub
input ci, // carry in (add: 1=carry; sub: 0=borrow)
input [WID:1] a, b, // operands input
output [WID:1] o, // result
output co, // carry out
output v // overflow
);

 

[Rohit]

I am not sure whether you can use semi-colon instead of comma as a
separator...But I guess its not a big issue converting all the
semicolons to comma as well.

use the following perl one liner:

perl -p -i -e 's/([input|output|inout]\s*\S*);/$1,/' *.v

hope it helps..

-Rohit