S
Seong Kang
Guest
Well, I just hit one year mark since the last day of work, and I have
promised my wife I will do any work coming in my way if I didn't find
what I liked in one year. So, here I am.
Seong Kang
127 Crescent Ave
Sunnyvale, CA 94087
(408) 738 - 3385
stradi2@hotmail.com
Technical
summary
* Programming Languages: C, C++, Java, Perl, Tcl, Unix Shell scripts,
various assembly
* Hardware Description Languages: Verilog, VHDL
* CAE tools: Synopsys DC, VCS, CoverMeter, PrimeTime, NC-Verilog,
Modelsim, Verplex, TestBuilder( SystemC Verification Library)
* Technologies: PCI, Ethernet, SDRAM, Flash
* Microprocessors: PPC, 68000, IP3000
Employment
04/02 - 10/02 Ubicom, Inc. Mountain View, CA
Design Verification Contractor
* Worked on verification of an 'Internet Edge' Processor that has main
processor, vector coprocessor, and configurable IOs.
* Defined and audited test plans.
* Implemented directed and random test cases utilizing in-house
verification language, assembly and C++.
* Wrote scripts to categorize and investigate random failures.
* Proposed a solution to obtain better random seeds.
* Wrote BFM's in C++ over TestBuilder and made modifications to the test
bench in Verilog and C++.
* Authored Perl scripts to isolate logic cones from netlist and devised
a manual implementation of RTL logic change as gates for an ECO.
* Ran equivalency checks using formal verification tools from Verplex.
Contract expiration coincided with tape out and a round of layoff.
11/01 - 01/02 Redshift Technologies Seoul, S. Korea
ASIC Verification Contractor
* Worked on verification of a Cable Modem Termination System ASIC.
* Led transition from UNIX/VCS environment to WINDOWS/ModelSim
environment, restructuring test run and regress environment.
* Debugged RTL failures utilizing wave form viewers and proposed RTL fixes.
Redshift was unsuccessful in getting additional fund and closed CMTS
project, and I became homesick.
08/99 - 10/01 Akamba Corp. Los Gatos, CA
ASIC Engineer
* Worked on ASICs interfacing PPC processor, Ethernet port, SDRAM and
PCI bus.
* Specified and implemented test bench APIs, directed and random
stimulus in Verilog and PLI.
* Debugged RTL and gate-level failures.
* Developed and maintained Perl and shell scripts for simulation and
regression.
* Implemented real-time hardware test platform in C to help with silicon
bring-up.
* Evaluated Coverage tools and proposed a candidate.
* Worked on timing verification using Primetime and simulations with SDF.
* Drafted failure mode analyses for ASIC bring-up.
* Interfaced and operated Simpod, a real silicon PPC chip working as a
verilog model, for hardware/software co-verification.
* Extracted test vector for silicon testing.
* Implemented Perl utilities for software QA group.
* Worked on lab system setup, EDA tool installation and license management.
Akamba corporation failed to secure sustained capitol and ceased all
operations
06/97 - 06/99 Dept. of Math, MSU E. Lansing, MI
Jr. Systems Analyst
* Configured and maintained machines running Win 9x/NT, MacOS, and Solaris.
* Wrote scripts, programs and pages for web service in HTML, Perl, Java
Script, and ASP.
09/96 - 12/96 Dept. of Math, MSU E. Lansing, MI
Undergraduate Teaching Assistant
* Led recitations for freshman course, College Algebra and Trigonometry.
* Graded assignments and exams.
01/96 - 08/96 Div. of Engineering Computing, MSU E. Lansing, MI
Student Consultant
* Configured and maintained windows machines.
Education
1997 - 1999 Michigan State University East Lansing, MI
Master of Science in Electrical Engineering
* Computer Engineering Specialization.
1993 - 1997 Michigan State University East Lansing, MI
Bachelor of Science with Honor in Computer Engineering
* Received Yates Memorial Engineering Scholarship.
* Won monetary prize in Herzog Mathematical Competition and participated
in Putnam Mathematical Competition.
* Received full scholarship from National Academy of Science, Space and
Technology, administered by the US Department of Education.
* Phi Kappa Phi Freshman Award.
Employment Status
* Available immediately.
* US citizen.
promised my wife I will do any work coming in my way if I didn't find
what I liked in one year. So, here I am.
Seong Kang
127 Crescent Ave
Sunnyvale, CA 94087
(408) 738 - 3385
stradi2@hotmail.com
Technical
summary
* Programming Languages: C, C++, Java, Perl, Tcl, Unix Shell scripts,
various assembly
* Hardware Description Languages: Verilog, VHDL
* CAE tools: Synopsys DC, VCS, CoverMeter, PrimeTime, NC-Verilog,
Modelsim, Verplex, TestBuilder( SystemC Verification Library)
* Technologies: PCI, Ethernet, SDRAM, Flash
* Microprocessors: PPC, 68000, IP3000
Employment
04/02 - 10/02 Ubicom, Inc. Mountain View, CA
Design Verification Contractor
* Worked on verification of an 'Internet Edge' Processor that has main
processor, vector coprocessor, and configurable IOs.
* Defined and audited test plans.
* Implemented directed and random test cases utilizing in-house
verification language, assembly and C++.
* Wrote scripts to categorize and investigate random failures.
* Proposed a solution to obtain better random seeds.
* Wrote BFM's in C++ over TestBuilder and made modifications to the test
bench in Verilog and C++.
* Authored Perl scripts to isolate logic cones from netlist and devised
a manual implementation of RTL logic change as gates for an ECO.
* Ran equivalency checks using formal verification tools from Verplex.
Contract expiration coincided with tape out and a round of layoff.
11/01 - 01/02 Redshift Technologies Seoul, S. Korea
ASIC Verification Contractor
* Worked on verification of a Cable Modem Termination System ASIC.
* Led transition from UNIX/VCS environment to WINDOWS/ModelSim
environment, restructuring test run and regress environment.
* Debugged RTL failures utilizing wave form viewers and proposed RTL fixes.
Redshift was unsuccessful in getting additional fund and closed CMTS
project, and I became homesick.
08/99 - 10/01 Akamba Corp. Los Gatos, CA
ASIC Engineer
* Worked on ASICs interfacing PPC processor, Ethernet port, SDRAM and
PCI bus.
* Specified and implemented test bench APIs, directed and random
stimulus in Verilog and PLI.
* Debugged RTL and gate-level failures.
* Developed and maintained Perl and shell scripts for simulation and
regression.
* Implemented real-time hardware test platform in C to help with silicon
bring-up.
* Evaluated Coverage tools and proposed a candidate.
* Worked on timing verification using Primetime and simulations with SDF.
* Drafted failure mode analyses for ASIC bring-up.
* Interfaced and operated Simpod, a real silicon PPC chip working as a
verilog model, for hardware/software co-verification.
* Extracted test vector for silicon testing.
* Implemented Perl utilities for software QA group.
* Worked on lab system setup, EDA tool installation and license management.
Akamba corporation failed to secure sustained capitol and ceased all
operations
06/97 - 06/99 Dept. of Math, MSU E. Lansing, MI
Jr. Systems Analyst
* Configured and maintained machines running Win 9x/NT, MacOS, and Solaris.
* Wrote scripts, programs and pages for web service in HTML, Perl, Java
Script, and ASP.
09/96 - 12/96 Dept. of Math, MSU E. Lansing, MI
Undergraduate Teaching Assistant
* Led recitations for freshman course, College Algebra and Trigonometry.
* Graded assignments and exams.
01/96 - 08/96 Div. of Engineering Computing, MSU E. Lansing, MI
Student Consultant
* Configured and maintained windows machines.
Education
1997 - 1999 Michigan State University East Lansing, MI
Master of Science in Electrical Engineering
* Computer Engineering Specialization.
1993 - 1997 Michigan State University East Lansing, MI
Bachelor of Science with Honor in Computer Engineering
* Received Yates Memorial Engineering Scholarship.
* Won monetary prize in Herzog Mathematical Competition and participated
in Putnam Mathematical Competition.
* Received full scholarship from National Academy of Science, Space and
Technology, administered by the US Department of Education.
* Phi Kappa Phi Freshman Award.
Employment Status
* Available immediately.
* US citizen.