P
Pride
Guest
Hi,
Have you ever met such situation? pullup(rst_l) can pull up rst_l when
it is bind in Vera interface,
but can not be pull up when it is bind in System Verilog bind file.
What may be wrong here?
Have you ever met such situation? pullup(rst_l) can pull up rst_l when
it is bind in Vera interface,
but can not be pull up when it is bind in System Verilog bind file.
What may be wrong here?