Why LVS match but LPE power name missed on DRACULA and Calib

[Boki]

Dear All:

I pass the LVS check on DIVA, DRACULA and Calibre, but their LPE all report
me POWER NAME error.
Does any body know why?

Thanks a lot!

Boki

 

[Andrew Beckett]

Boki,

This question is meaningless without some context or more details. It is quite
likely technology specific, and you give no details whatsoever, so I really
don't see how you expect anyone to be able to help you?

Sorry to be hard, but we don't have the benefit of ESP! (at least, I don't ;-&gt

Andrew.

On Wed, 17 Sep 2003 13:40:30 +0800, "Boki" <bokiteam@ms21.hinet.net> wrote:

Dear All:

I pass the LVS check on DIVA, DRACULA and Calibre, but their LPE all report
me POWER NAME error.
Does any body know why?

Thanks a lot!

Boki

--
Andrew Beckett
Senior Technical Leader
Custom IC Solutions
Cadence Design Systems Ltd

 

[boki]

Dear Andrew,
I use all files that comes from official support, I think
there is no problem on rule or technology files, I guess there are
problems on my POWER NAME/PIN/TEXT/LABEL, I could explain more detail
here:

When everytime I do LVS, DIVA, DRACULA, and Calibre shows it all
match, but in DRACULA report, the valid coresspond node pair is no VDD
and VSS node( Circuit still match). For DIVA and Calibre LVS, there is
no that kind of problem, but it just shows NO POWER NAME in every LPE
check @@...

I am using TSMC25RF 1P5M process, thanks!

Regards,
Boki.

Andrew Beckett <andrewb@DELETETHISBITcadence.com> wrote in message news:<4ijhmv8vhecsjljebkijb3v54gihl7isn1@4ax.com>...

Boki,

This question is meaningless without some context or more details. It is quite
likely technology specific, and you give no details whatsoever, so I really
don't see how you expect anyone to be able to help you?

Sorry to be hard, but we don't have the benefit of ESP! (at least, I don't ;-&gt

Andrew.

On Wed, 17 Sep 2003 13:40:30 +0800, "Boki" <bokiteam@ms21.hinet.net> wrote:

Dear All:

I pass the LVS check on DIVA, DRACULA and Calibre, but their LPE all report
me POWER NAME error.
Does any body know why?

Thanks a lot!

Boki

 

[Andrew Beckett]

Often tools need to know where the power and ground nodes are, so that they can
reduce devices connected to power or ground, or lump capacitance to ground
(say). Dracula is one example.

In Dracula, power nets are labelled by adding after their name in the
texting, and ground nets are labelled using :G after the name in the texting.

This tells it which are power and ground.

Read the documentation on the verification tool in particular to find out
more info on the particular method of describing power and ground for the
verification tool you're using.

Andrew.

On 17 Sep 2003 19:44:54 -0700, bokiteam@ms21.hinet.net (boki) wrote:

Dear Andrew,
I use all files that comes from official support, I think
there is no problem on rule or technology files, I guess there are
problems on my POWER NAME/PIN/TEXT/LABEL, I could explain more detail
here:

When everytime I do LVS, DIVA, DRACULA, and Calibre shows it all
match, but in DRACULA report, the valid coresspond node pair is no VDD
and VSS node( Circuit still match). For DIVA and Calibre LVS, there is
no that kind of problem, but it just shows NO POWER NAME in every LPE
check @@...

I am using TSMC25RF 1P5M process, thanks!

Regards,
Boki.

Andrew Beckett <andrewb@DELETETHISBITcadence.com> wrote in message news:<4ijhmv8vhecsjljebkijb3v54gihl7isn1@4ax.com>...
Boki,

This question is meaningless without some context or more details. It is quite
likely technology specific, and you give no details whatsoever, so I really
don't see how you expect anyone to be able to help you?

Sorry to be hard, but we don't have the benefit of ESP! (at least, I don't ;-&gt

Andrew.

On Wed, 17 Sep 2003 13:40:30 +0800, "Boki" <bokiteam@ms21.hinet.net> wrote:

Dear All:

I pass the LVS check on DIVA, DRACULA and Calibre, but their LPE all report
me POWER NAME error.
Does any body know why?

Thanks a lot!

Boki

--
Andrew Beckett
Senior Technical Leader
Custom IC Solutions
Cadence Design Systems Ltd