Why extreme S-parameter values

[Mikko Kiviranta]

Dear Colleaques,

Checking the manufacturer-specified S-parameters of the
Infineon BFP640 transistor I noticed that the values at the
low-frequency end look funny. For instance, at 100MHz
(Vce=2.0 Ic=2.5mA) S22 = 0.9995<-3.0 which would translate
into 18ohms with 0.8pF in series, or alternatively 200kohm
with 0.8pF in parallel. This does not sound like a collector
of a decent BJT at all!

What am I seeing? Could it be the dc-blocking capacitor
of the network analyzer used by Infineon? At 500MHz
(Vce=2.0V, Ic=2.5mA) S22 = 0.9699<-14.4, or 48ohms with
0.8pF in series, which would support the dc-block
hypothesis.

But then again, for (Vce=3.0, Ic=20mA) Infineon gives
S22 = 0.9892<-7.5 at 100MHz, or 63ohms + 2.1pF,
and at 500 MHz S22 = 0.7818<-32, or 68ohms + 2.1pF.
Changing the DUT bias point would change the size of
the NWA dc-block? Not very assuring. Besides, publishing
S-parameters which would not reflect the properties of the
DUT but would rather be dominated by the setup parasitics
does not sound what a professional company like Infineon
would do.

Taking randomly another device, the Infineon BFP620F,
I notice similar behavior. For Vce=2.0V, Ic=2.5mA
S22 = 0.9978<-3.2 at 100MHz and S22 = 0.9599<-15.9
at 500MHz. Again S-parameters I would not expect.
Take another manufacturer: Philips BFG425W is specified
(Vce=3.0V Ic=20mA) with S22 = 0.935<-8.3 at 100MHz, i.e
260ohms+2.8pF or , and S22 = 0.720<-32.8 at 500MHz,
or 78ohms + 2.5pF. Again a stange series capacitance,
or

Phase accuracy of the network analyzer would make
the readings at extreme S-parameter magnitudes unreliable,
of course, but the question is why a BJT would show such
extreme parameters at all. A nicely-behaving example
is the Agilent MGA-82563 with S22 = 0.16<-99 spec (or
50ohm in parallel with 10pF) at 100MHz. Agreed, it
is not a bare BJT, but I wouldn't expect it to differ
that radically.

So, what's going on here? Do manufacturers knowingly
publish data dominated by the dc-blocking cap? I can't
imagine this being any sort of resonance of the package
parasitics, either, as 100MHz should be effectively dc
for these devices. I guess I'm missing something very
simple and obvious here...

Regards,
Mikko

 

[Frank Raffaeli]

Mikko Kiviranta wrote:

Dear Colleaques,

Checking the manufacturer-specified S-parameters of the
Infineon BFP640 transistor I noticed that the values at the
low-frequency end look funny. For instance, at 100MHz
(Vce=2.0 Ic=2.5mA) S22 = 0.9995<-3.0 which would translate
into 18ohms with 0.8pF in series, or alternatively 200kohm
with 0.8pF in parallel. This does not sound like a collector
of a decent BJT at all!

What am I seeing? Could it be the dc-blocking capacitor
of the network analyzer used by Infineon? At 500MHz
(Vce=2.0V, Ic=2.5mA) S22 = 0.9699<-14.4, or 48ohms with
0.8pF in series, which would support the dc-block
hypothesis.

But then again, for (Vce=3.0, Ic=20mA) Infineon gives
S22 = 0.9892<-7.5 at 100MHz, or 63ohms + 2.1pF,
and at 500 MHz S22 = 0.7818<-32, or 68ohms + 2.1pF.
Changing the DUT bias point would change the size of
the NWA dc-block? Not very assuring. Besides, publishing
S-parameters which would not reflect the properties of the
DUT but would rather be dominated by the setup parasitics
does not sound what a professional company like Infineon
would do.

Taking randomly another device, the Infineon BFP620F,
I notice similar behavior. For Vce=2.0V, Ic=2.5mA
S22 = 0.9978<-3.2 at 100MHz and S22 = 0.9599<-15.9
at 500MHz. Again S-parameters I would not expect.
Take another manufacturer: Philips BFG425W is specified
(Vce=3.0V Ic=20mA) with S22 = 0.935<-8.3 at 100MHz, i.e
260ohms+2.8pF or , and S22 = 0.720<-32.8 at 500MHz,
or 78ohms + 2.5pF. Again a stange series capacitance,
or

Phase accuracy of the network analyzer would make
the readings at extreme S-parameter magnitudes unreliable,
of course, but the question is why a BJT would show such
extreme parameters at all. A nicely-behaving example
is the Agilent MGA-82563 with S22 = 0.16<-99 spec (or
50ohm in parallel with 10pF) at 100MHz. Agreed, it
is not a bare BJT, but I wouldn't expect it to differ
that radically.

So, what's going on here? Do manufacturers knowingly
publish data dominated by the dc-blocking cap? I can't
imagine this being any sort of resonance of the package
parasitics, either, as 100MHz should be effectively dc
for these devices. I guess I'm missing something very
simple and obvious here...

Regards,
Mikko

Like many RF / microwave transistors, this device is optimized for a
higher frequency. I have had trouble when trying to match it below 1
GHz. Check the MSG at the frequency you need - it is probably too high
for stability without feedback.

OTOH, it works great as an LNA for 5.7 GHz, or an 18 dB Gain, 1 dB NF
amp at 2.3 GHz.

Frank Raffaeli
http://www.aomwireless.com/

 

[Mikko Kiviranta]

Frank Raffaeli wrote:

Mikko Kiviranta wrote:
Checking the manufacturer-specified S-parameters of the
Infineon BFP640 transistor I noticed that the values at the
low-frequency end look funny. For instance, at 100MHz
(Vce=2.0 Ic=2.5mA) S22 = 0.9995<-3.0 which would translate
into 18ohms with 0.8pF in series, or alternatively 200kohm
with 0.8pF in parallel. This does not sound like a collector
of a decent BJT at all!

Hi Frank, thanks for your comment.

Like many RF / microwave transistors, this device is optimized for a
higher frequency.

That is quite true, but it still should behave like an ordinary
BJT at low frequencies (unless I'm missing something). In the dc
limit, you cannot even bias it using standard circuitry if it
didn't behave (roughly) like an ordinary BJT. I see no reason
why, looking into its collector, the impedance should suddenly
look capacitive at 100MHz, even though the device is optimized
for several GHz operation. Heck, it is still supposed to be
modellable by the Gummel-Poon, plus layout & package parasitics.

Check the MSG at the frequency you need - it is probably too high
for stability without feedback.

It was exactly the stability circles I was computing
when I started to feel something is wrong. Even if I was designing
for, say, 2.4 GHz, the device should be stable at all frequencies
including 100 MHz. Then the question would be: can I rely on the
published S-parameters when computing the stability circles ? Do
they really describe the plain DUT without setup parasitics? If the
answer is 'yes they really do' I could move forward, but I would
still like to understand what is the origin of the counterintuitive
value. I must be missing something because BFP640 seems not to be
the only BJT exhibiting strange-looking S-params.

I have had trouble when trying to match it below 1 GHz.

This is interesting - what happened?

Regards,
Mikko

 

[John Larkin]

On Wed, 20 Jul 2005 14:26:18 +0300, Mikko Kiviranta
<Okkim.Atnarivik@iki.fi.invalid> wrote:

Dear Colleaques,

Checking the manufacturer-specified S-parameters of the
Infineon BFP640 transistor I noticed that the values at the
low-frequency end look funny. For instance, at 100MHz
(Vce=2.0 Ic=2.5mA) S22 = 0.9995<-3.0 which would translate
into 18ohms with 0.8pF in series, or alternatively 200kohm
with 0.8pF in parallel. This does not sound like a collector
of a decent BJT at all!

At a relatively low frequency, a bjt collector does look like a big
resistor in parallel with a small capacitor. If you accept the .8 puff
and 200k interpretation of the vector, the 200k sounds a bit high, but
then it doesn't take much of a measurement error in a 50-ohm analyzer
to make big mistakes at very high impedances: 200k is 4000 times 50
ohms! All the 200k number really means is "way, way higher than 50
ohms" which is basically true here. Just 0.1% error on the 0.9995
could account for a bunch of kohms.

The 0.8 pF does sound a tad high, given that the datasheet claims more
like 0.3 total collector capacitance, but Ccb is multiplied by Miller
effect, so even that's not too crazy.

As you note, things closer to 50 ohms measure more accurately.


John

 

[Frank Raffaeli]

Mikko Kiviranta wrote:

Frank Raffaeli wrote:
Mikko Kiviranta wrote:

[snippage]

Check the MSG at the frequency you need - it is probably too high
for stability without feedback.

It was exactly the stability circles I was computing
when I started to feel something is wrong. Even if I was designing
for, say, 2.4 GHz, the device should be stable at all frequencies
including 100 MHz. Then the question would be: can I rely on the
published S-parameters when computing the stability circles ? Do
they really describe the plain DUT without setup parasitics? If the
answer is 'yes they really do' I could move forward, but I would
still like to understand what is the origin of the counterintuitive
value. I must be missing something because BFP640 seems not to be
the only BJT exhibiting strange-looking S-params.

Do yourself a favor and get a good S-parameter modeling tool that you
can sweep frequency-wise. If you need something free, try Smith.exe,
which I think you can still download from:
http://www.rfglobalnet.com/

You can import the S-parameters for the infineon SiGe transistor, and
run parametric analysis one frequency at a time.

If you application is below 1GHz, seriously consider another
transistor, such as the BFP420. I's much easier to match down there.

Some of the effects you see are related to the S12 and S21 components.
when the gain is as high as it is, the S22 is for an active device, not
just a BJT junction with a parallel cap. Same for the S11, definitions
aside.

Bottom line: if you see something near the unit circle, pull it in. For
example, if (mag) S11 is something like 0.980 outside the frequency of
interest, your input match needs to be lossy at this frequency to
insure stability, because the transistor isn't going to be absorbing a
lot of energy.

A good reference: Microwave Circuit Design Using Linear and Nonlinear
Techniques ... Vendelin, George D. / Pavio, Anthony M. / Rohde, Ulrich
L.

Frank Raffaeli
http://www.aomwireless.com/

 

[Mikko Kiviranta]

Frank Raffaeli wrote:

Mikko Kiviranta wrote:
It was exactly the stability circles I was computing ...
Do yourself a favor and get a good S-parameter modeling tool that ...

I don't feel my problem is the lack of tools. I'm using APLAC,
and for an example, you may be interested to check the computed
stability circles for the BFP640 including the parasitics of
the SOT343 package (as they are not included acoording to the
README in the S-param package) sweeped 0.1GHz - 20GHz at
http://www.24.fi/kiviranta/bfp640_load_stability.gif , and
http://www.24.fi/kiviranta/bfp640_source_stability.gif

My problem was that I was not sure whether I intepret properly
the S-params published by Infineon. The 0.9995<3.0 figure
does not seem to make your eyebrows rise. Also, John Larkin
considered this a plausible reading. So I'm going to accept
that this is a good honest value.

Some of the effects you see are related to the S12 and S21 components.

True, but at low frequencies the S12 and S21 are approximated
by the Miller capacitance, which I would expect to *reduce* the
dynamic impedance at the collector, not to boost it into the 200kohm
range.

If you application is below 1GHz, seriously consider another...

Thanks for your suggestion, unfortunately I have boundary
conditions which force me to misuse a BFP640-like device in
a lowish-frequency non-50ohm system, so that the standard
wisdom is not always applicable.

Regards,
Mikko

 

[Mikko Kiviranta]

John Larkin wrote:

At a relatively low frequency, a bjt collector does look like a big
resistor in parallel with a small capacitor. If you accept the .8 puff
and 200k interpretation of the vector, the 200k sounds a bit high, but

Thanks for your opinion, John. I simulated the dc characteristics
from the Gummel-Poon parameters given by the manufacturer
( http://www.24.fi/kiviranta/bfp640_chars.gif ) and zoomed in
to the saturated region just to find, indeed, a ~200kohm slope
there. A surprisingly large dynamic resistance IMO!

I wonder whether a particularly narrow base region typical
to SiGe transistors diminished the Early effect? According
to what I weakly recollect from the top of my head, the effect
should go just the other way around, though.

Regards,
Mikko

 

[John Larkin]

On Thu, 21 Jul 2005 12:34:42 +0300, Mikko Kiviranta
<Okkim.Atnarivik@iki.fi.invalid> wrote:

John Larkin wrote:
At a relatively low frequency, a bjt collector does look like a big
resistor in parallel with a small capacitor. If you accept the .8 puff
and 200k interpretation of the vector, the 200k sounds a bit high, but

Thanks for your opinion, John. I simulated the dc characteristics
from the Gummel-Poon parameters given by the manufacturer
( http://www.24.fi/kiviranta/bfp640_chars.gif ) and zoomed in
to the saturated region just to find, indeed, a ~200kohm slope
there. A surprisingly large dynamic resistance IMO!

I wonder whether a particularly narrow base region typical
to SiGe transistors diminished the Early effect? According
to what I weakly recollect from the top of my head, the effect
should go just the other way around, though.

Regards,
Mikko

OK, I'm impressed by both the VNA accuracy and by the high collector
impedance, since both seem to be real. I thought that SiGe transistors
had pretty darned slopey collector curves.

<bitch> In typical RF fashion, the Infineon datasheet gives no DC
curves. It's common for even microwave fet datasheets to not furnish
enough DC data to bias the critters properly </bitch>

I've played around with SiGe transistors as fast switches (I work in
time domain mostly, got no use for sine waves) and found them to be
surprisingly slow as switches. PHEMTs are blindingly fast and behave
pretty much like a simple Gm + parasitic capacitor model would
predict.

John

 

[John Larkin]

On Fri, 22 Jul 2005 10:31:47 +0300, "Kiviranta, Mikko"
<Okkim.Atnarivik@iki.fi.invalid> wrote:

OK, I'm impressed by both the VNA accuracy and by the high collector
impedance, since both seem to be real. I thought that SiGe transistors
had pretty darned slopey collector curves.

I had the same impression about the slopey curves, and I'm still
suspecting there may be something wrong in these results. The device
has tremendous power gain at low frequencies if the high R-dynamic
is real.

Regards,
Mikko

Hmmm, yeah, that computes to a low-freq voltage gain, with a cc load,
of 20K or something. Sounds fishy.

John

 

[Kiviranta, Mikko]

OK, I'm impressed by both the VNA accuracy and by the high collector
impedance, since both seem to be real. I thought that SiGe transistors
had pretty darned slopey collector curves.

I had the same impression about the slopey curves, and I'm still
suspecting there may be something wrong in these results. The device
has tremendous power gain at low frequencies if the high R-dynamic
is real.

Regards,
Mikko