A
Allen
Guest
Can anyone give me some advice on my dc analysis? I am designing a
digital PLL, when I run dc analysis for the charge pump circuit,
cadence tells me that error is found because the step size is too
large and it doesn't converge.
Thanks.
Best,
Allen
digital PLL, when I run dc analysis for the charge pump circuit,
cadence tells me that error is found because the step size is too
large and it doesn't converge.
Thanks.
Best,
Allen