Why 2 power transistors in my power supply ?

[Abbie]

Hello everyone,
I have a variable current/voltage power supply 15V/3A.
At the back of the unit there is a large heatsink with to
2N3055. I have looked at the datasheet of these and
found that they can conduct up to 15A, hence I don't
understand for what reason there are 2 of them ? Another
question that I have is that I often see in power supplies
designs that the power transistors have a resistor from
e to b such that they operate only when current goes above
,lets say, 1A. Is there any particular reason why power
transistors need to be controlled this way ?

 

[Chris Welsh]

"Abbie" <AbbieAbbieAbbie@btinternet.com> wrote in message
news:bqa6ng$9cn$1@titan.btinternet.com...

Hello everyone,
I have a variable current/voltage power supply 15V/3A.
At the back of the unit there is a large heatsink with to
2N3055. I have looked at the datasheet of these and
found that they can conduct up to 15A, hence I don't
understand for what reason there are 2 of them ?

If it is a Switching supply, there could be 4 or more power transistors,
depending on the configuration....

Chris

 

[John Popelish]

Abbie wrote:

Hello everyone,
I have a variable current/voltage power supply 15V/3A.
At the back of the unit there is a large heatsink with to
2N3055. I have looked at the datasheet of these and
found that they can conduct up to 15A, hence I don't
understand for what reason there are 2 of them ? Another
question that I have is that I often see in power supplies
designs that the power transistors have a resistor from
e to b such that they operate only when current goes above
,lets say, 1A. Is there any particular reason why power
transistors need to be controlled this way ?

They are capable of handling the heat produced by the passage of 15
amps only if they are saturated on (used as saturated switches). If
they are passing current and dropping large voltages at the same time,
the current has to be reduced to keep the heat within capability.
This is called the safe operating area (area being the product of
volts and amps, instead of length and width). Look at figure 2
(Active Region Safe Operating Area) on the data sheet. The DC line is
the one that applies to linear power supply regulators, and then, only
with an adequate heat sink to keep the case temperature below 25 C.
So a hot heat sink allows less than shown here. Then you have to
derate the power by the curve shown in figure 1.

http://www.ee.latrobe.edu.au/internal/workshop/store/pdf/MJ2955.pdf

--
John Popelish

 

[John Popelish]

Abbie wrote:

"John Popelish" <jpopelish@rica.net> wrote in message news:3FC8E3B2.18F7920C@rica.net...

... The DC line is
the one that applies to linear power supply regulators, and then, only
with an adequate heat sink to keep the case temperature below 25 C.
So a hot heat sink allows less than shown here. Then you have to
derate the power by the curve shown in figure 1.

http://www.ee.latrobe.edu.au/internal/workshop/store/pdf/MJ2955.pdf

I can tell you that when this unit works at 3amp the heat sink is much
higher than 25 C, in fact it is so hot that I cannot touch it with my hand
for more than one second.

It was probably a simple engineering trade off to use two transistors
in parallel (with each pretty severely derated) but a smaller heat
sink (for a higher peak temperature and worse derating) as a total
cost compromise. The transistors are cheap compared to a triple sized
heat sink and a bigger overall package. This is especially true when
you consider the cost of shipping thousands of units.

--
John Popelish

 

[Abbie]

"John Popelish" <jpopelish@rica.net> wrote in message news:3FC8E3B2.18F7920C@rica.net...

Abbie wrote:

Hello everyone,
I have a variable current/voltage power supply 15V/3A.
At the back of the unit there is a large heatsink with to
2N3055. I have looked at the datasheet of these and
found that they can conduct up to 15A, hence I don't
understand for what reason there are 2 of them ? Another
question that I have is that I often see in power supplies
designs that the power transistors have a resistor from
e to b such that they operate only when current goes above
,lets say, 1A. Is there any particular reason why power
transistors need to be controlled this way ?

They are capable of handling the heat produced by the passage of 15
amps only if they are saturated on (used as saturated switches). If
they are passing current and dropping large voltages at the same time,
the current has to be reduced to keep the heat within capability.
This is called the safe operating area (area being the product of
volts and amps, instead of length and width). Look at figure 2
(Active Region Safe Operating Area) on the data sheet. The DC line is
the one that applies to linear power supply regulators, and then, only
with an adequate heat sink to keep the case temperature below 25 C.
So a hot heat sink allows less than shown here. Then you have to
derate the power by the curve shown in figure 1.

http://www.ee.latrobe.edu.au/internal/workshop/store/pdf/MJ2955.pdf

I can tell you that when this unit works at 3amp the heat sink is much
higher than 25 C, in fact it is so hot that I cannot touch it with my hand
for more than one second.

--
John Popelish

 

[Bill Bowden]

"Abbie" <AbbieAbbieAbbie@btinternet.com> wrote in message news:<bqa6ng$9cn$1@titan.btinternet.com>...

Hello everyone,
I have a variable current/voltage power supply 15V/3A.
At the back of the unit there is a large heatsink with to
2N3055. I have looked at the datasheet of these and
found that they can conduct up to 15A, hence I don't
understand for what reason there are 2 of them ? Another
question that I have is that I often see in power supplies
designs that the power transistors have a resistor from
e to b such that they operate only when current goes above
,lets say, 1A. Is there any particular reason why power
transistors need to be controlled this way ?

They probably use 2 transistors to spread the heat more
evenly on the heat sink. A fixed supply could use one
2N3055 at 3 amps since most of the power is going to the
load, but a variable supply will produce much more heat
when the output is set low. When the output is low compared
to the input, most of the input power will end up as heat
on the transistor, so they use 2 of them to run cooler.
Another problem is the gain of the 2N3055 drops off at higher
current, so they probably have more gain at 1.5 amps than 3 amps.

-Bill

 

[John Popelish]

Abbie wrote:

I remember having a discussion with you regarding my power supply
with the circuit that I had, did you manage to see how it works? I
understand it now, it took me a long time, but I had component
values and node voltages to make life easier. I drew a new diagram
which simplifies the circuit by eliminating all components which are
related to current limiting. These components can be ignored when
we analyse how the voltage is regulted and can be studied later. So
here is the diagram, see if you understand it, if not I will explain, it
is very easy.

http://wwwwww.users.btopenworld.com/psu-vol.gif

You have made considerable progress in documenting this circuit,
correctly. It makes much more sense than the original version, and
corrects a couple errors on the second. Rather than going through an
explanation, I would like to hear your take, so I have a data point on
your level of understanding. That way, if there is something I
disagree with, I will be in a better position to communicate with you,
effectively. There is still a compensation network missing around the
opamp, isn't there?

Have you made a similar, simplified schematic, that documents the
current limit system?

--
John Popelish

 

[Abbie]

It was probably a simple engineering trade off to use two transistors
in parallel (with each pretty severely derated) but a smaller heat
sink (for a higher peak temperature and worse derating) as a total
cost compromise. The transistors are cheap compared to a triple sized
heat sink and a bigger overall package. This is especially true when
you consider the cost of shipping thousands of units.

--
John Popelish

I remember having a discussion with you regarding my power supply
with the circuit that I had, did you manage to see how it works? I
understand it now, it took me a long time, but I had component
values and node voltages to make life easier. I drew a new diagram
which simplifies the circuit by eliminating all components which are
related to current limiting. These components can be ignored when
we analyse how the voltage is regulted and can be studied later. So
here is the diagram, see if you understand it, if not I will explain, it
is very easy.

http://wwwwww.users.btopenworld.com/psu-vol.gif

 

[John Popelish]

Abbie wrote:

"John Popelish" <jpopelish@rica.net> wrote in message news:3FCA4257.6F12DACA@rica.net...
Abbie wrote:
....
http://wwwwww.users.btopenworld.com/psu-vol.gif

You have made considerable progress in documenting this circuit,
correctly. It makes much more sense than the original version, and
corrects a couple errors on the second. Rather than going through an
explanation, I would like to hear your take, so I have a data point on
your level of understanding. That way, if there is something I
disagree with, I will be in a better position to communicate with you,
effectively.

The fact that the minus input of the op-amp is
connected to the ground confused me at first, but then I realised that since
ground is also psu red o.p. means that there is a negative feedback from
the o.p. of the op-amp, through all the transistors, and back to the minus
i.p. of the op-amp. Therefore from op-amp basic principles both minus
and plus inputs are equal, and are equal to gnd, i.e. 0V.

That is one of the basic simplifying assumptions of linear opamp
circuits.

This means that the voltage at VDIAL (top) is 0V. The voltage at Zener 431
is 2.5V. Hence the voltage across the 910 ohms resistor is always 2.5V
(assume the variable resistor below the 910 one is not there).
Now, constant voltage, so we can know the current through the 910 resistor.
This current must go through VDIAL, so the voltage of the negative rail will
be VDIAL times this current. That's it. By varying VDIAL we vary our
negative rail.

Right. The voltage divider between the negative output and the +2.5
volt reference must always produce 0 volts. You adjust the negative
output with respect to this internal zero volts by changing one of the
divider resistors.

This circuit was difficult for me to understand because all the circuits I have
seen up to now regulate the positive rail, whereas here we are regulating
the neative rail.
It's the same thing, but it is like looking at something upside down.

Yes. you have to be flexible.

There is still a compensation network missing around the
opamp, isn't there?

I don't think so, but tell me what you mean or why.

An opamp has very high gain, and if the feedback loop has enough gain
at the frequency where the net phase shift turns negative feedback
into positive feedback is higher than 1, the loop will oscillate.

The capacitor across VDIAL provides phase lead (increasing gain with
increasing frequency), so it cannot be rolling the gain off at high
frequencies to prevent oscillations. The opamp has an internal
capacitor that rolls of the gain proportional to frequency that gets
the gain below one at a lower frequency than the one that has 180
degrees of phase shift internal to the opamp, but it does not account
for the extra gain and phase shift of the three transistor amplifier
chain hooked onto the output of the opamp. I would have expected some
high frequency roll off or other phase compensation network somewhere
in the loop to reduce the high frequency loop gain.

By the way, this chain has a lot more phase shift than it could. The
turn on bias for the transistor chain is provided by the 10k pull up
resistor above the zener diode, and this is stolen by either the
voltage regulating opamp or the current regulation opamp (whichever
pulls down more) to turn off the transistors.

The first current gain stage lowers this signal source impedance from
10k to 1k, which is about right for a single stage of emitter
follower, but the second emitter follower should drive a base to
emitter resistance (across the pair of 2N3055) of something more like
100 ohms, not 1k, to speed up the turn off of those big transistors
when the upstream transistors turn off.

Have you made a similar, simplified schematic, that documents the
current limit system?

Not yet, but I will.

--
John Popelish

Please tell me what you think. I need to know if what I think is correct.

--
John Popelish

 

[Abbie]

"John Popelish" <jpopelish@rica.net> wrote in message news:3FCA4257.6F12DACA@rica.net...

Abbie wrote:

I remember having a discussion with you regarding my power supply
with the circuit that I had, did you manage to see how it works? I
understand it now, it took me a long time, but I had component
values and node voltages to make life easier. I drew a new diagram
which simplifies the circuit by eliminating all components which are
related to current limiting. These components can be ignored when
we analyse how the voltage is regulted and can be studied later. So
here is the diagram, see if you understand it, if not I will explain, it
is very easy.

http://wwwwww.users.btopenworld.com/psu-vol.gif

You have made considerable progress in documenting this circuit,
correctly. It makes much more sense than the original version, and
corrects a couple errors on the second. Rather than going through an
explanation, I would like to hear your take, so I have a data point on
your level of understanding. That way, if there is something I
disagree with, I will be in a better position to communicate with you,
effectively.

The fact that the minus input of the op-amp is
connected to the ground confused me at first, but then I realised that since
ground is also psu red o.p. means that there is a negative feedback from
the o.p. of the op-amp, through all the transistors, and back to the minus
i.p. of the op-amp. Therefore from op-amp basic principles both minus
and plus inputs are equal, and are equal to gnd, i.e. 0V.

This means that the voltage at VDIAL (top) is 0V. The voltage at Zener 431
is 2.5V. Hence the voltage across the 910 ohms resistor is always 2.5V
(assume the variable resistor below the 910 one is not there).
Now, constant voltage, so we can know the current through the 910 resistor.
This current must go through VDIAL, so the voltage of the negative rail will
be VDIAL times this current. That's it. By varying VDIAL we vary our
negative rail.

This circuit was difficult for me to understand because all the circuits I have
seen up to now regulate the positive rail, whereas here we are regulating
the neative rail. It's the same thing, but it is like looking at something upside
down.

There is still a compensation network missing around the
opamp, isn't there?

I don't think so, but tell me what you mean or why.

Have you made a similar, simplified schematic, that documents the
current limit system?

Not yet, but I will.

--
John Popelish

Please tell me what you think. I need to know if what I think is correct.

 

[Terri]

Is anyone still reading this thread ? Calling John Popelish ?
I have some questions regarding your reply, see below

"John Popelish" <jpopelish@rica.net> wrote in message news:3FCA6590.F2E2286E@rica.net...

Abbie wrote:

"John Popelish" <jpopelish@rica.net> wrote in message news:3FCA4257.6F12DACA@rica.net...
Abbie wrote:
...
http://wwwwww.users.btopenworld.com/psu-vol.gif

You have made considerable progress in documenting this circuit,
correctly. It makes much more sense than the original version, and
corrects a couple errors on the second. Rather than going through an
explanation, I would like to hear your take, so I have a data point on
your level of understanding. That way, if there is something I
disagree with, I will be in a better position to communicate with you,
effectively.

The fact that the minus input of the op-amp is
connected to the ground confused me at first, but then I realised that since
ground is also psu red o.p. means that there is a negative feedback from
the o.p. of the op-amp, through all the transistors, and back to the minus
i.p. of the op-amp. Therefore from op-amp basic principles both minus
and plus inputs are equal, and are equal to gnd, i.e. 0V.

That is one of the basic simplifying assumptions of linear opamp
circuits.

This means that the voltage at VDIAL (top) is 0V. The voltage at Zener 431
is 2.5V. Hence the voltage across the 910 ohms resistor is always 2.5V
(assume the variable resistor below the 910 one is not there).
Now, constant voltage, so we can know the current through the 910 resistor.
This current must go through VDIAL, so the voltage of the negative rail will
be VDIAL times this current. That's it. By varying VDIAL we vary our
negative rail.

Right. The voltage divider between the negative output and the +2.5
volt reference must always produce 0 volts. You adjust the negative
output with respect to this internal zero volts by changing one of the
divider resistors.

This circuit was difficult for me to understand because all the circuits I have
seen up to now regulate the positive rail, whereas here we are regulating
the neative rail.
It's the same thing, but it is like looking at something upside down.

Yes. you have to be flexible.

Very good, thank you !!

There is still a compensation network missing around the
opamp, isn't there?

I don't think so, but tell me what you mean or why.


An opamp has very high gain, and if the feedback loop has enough gain
at the frequency where the net phase shift turns negative feedback
into positive feedback is higher than 1, the loop will oscillate.

Which frequecy are you thinking about, 50 Hz?

The capacitor across VDIAL provides phase lead (increasing gain with
increasing frequency), so it cannot be rolling the gain off at high
frequencies to prevent oscillations.

This is an electrolitic, it is there, I presume, to stabilize the voltage at that
point, and for the same reason there is an electrolitic over the zener.

The opamp has an internal
capacitor that rolls of the gain proportional to frequency that gets
the gain below one at a lower frequency than the one that has 180
degrees of phase shift internal to the opamp, but it does not account
for the extra gain and phase shift of the three transistor amplifier
chain hooked onto the output of the opamp. I would have expected some
high frequency roll off or other phase compensation network somewhere
in the loop to reduce the high frequency loop gain.

Why will there be a phase shift to the chain of transistors, is it stray
capacitance, or is it the time it takes the transistors to react to changes ?

There are two capacitors, one is 10nF from pin 2 to pin 6 of the 741, i.e.
from the minus input to the output, and another, 100pF, from pin 5 to
pin 6. Pin 5 is one of two offset-null pins.

By the way, this chain has a lot more phase shift than it could.

The
turn on bias for the transistor chain is provided by the 10k pull up
resistor above the zener diode, and this is stolen by either the
voltage regulating opamp or the current regulation opamp (whichever
pulls down more) to turn off the transistors.

yes

The first current gain stage lowers this signal source impedance from
10k to 1k, which is about right for a single stage of emitter
follower, but the second emitter follower should drive a base to
emitter resistance (across the pair of 2N3055) of something more like
100 ohms, not 1k, to speed up the turn off of those big transistors
when the upstream transistors turn off.

There is a resistor from output plus to output minus of 2.2k so we have
current also with nothing connected to the supply. What is R7 for, is it
thermal compensation. Which component doesn't look right, is it the
way in which the transistors are connected or the values of the e-b
resistors in the 2nd and 3rd stages ?

Have you made a similar, simplified schematic, that documents the
current limit system?

Not yet, but I will.



--
John Popelish

Please tell me what you think. I need to know if what I think is correct.


--
John Popelish

 

[John Popelish]

Terri wrote:

Is anyone still reading this thread ? Calling John Popelish ?
I have some questions regarding your reply, see below

"John Popelish" <jpopelish@rica.net> wrote in message news:3FCA6590.F2E2286E@rica.net...

An opamp has very high gain, and if the feedback loop has enough gain
at the frequency where the net phase shift turns negative feedback
into positive feedback is higher than 1, the loop will oscillate.

Which frequecy are you thinking about, 50 Hz?

Probably low kilohertz or high hundred hertz. Especially with that
high value of base to emitter resistor on the 2N3055s.

The capacitor across VDIAL provides phase lead (increasing gain with
increasing frequency), so it cannot be rolling the gain off at high
frequencies to prevent oscillations.

This is an electrolitic, it is there, I presume, to stabilize the voltage at that
point, and for the same reason there is an electrolitic over the zener.

If it is an electrolytic, you are probably right. Too big ot be part
of the feedback stabilization.

The opamp has an internal
capacitor that rolls of the gain proportional to frequency that gets
the gain below one at a lower frequency than the one that has 180
degrees of phase shift internal to the opamp, but it does not account
for the extra gain and phase shift of the three transistor amplifier
chain hooked onto the output of the opamp. I would have expected some
high frequency roll off or other phase compensation network somewhere
in the loop to reduce the high frequency loop gain.

Why will there be a phase shift to the chain of transistors, is it stray
capacitance, or is it the time it takes the transistors to react to changes ?

It is mostly the internal capacitance that limits how fast any
transistor can react to an input signal. There is an inherent limit
based on the charge carrier mobility, but this is a minor factor
compared to the junction capacitances in a circuit like this.

There are two capacitors, one is 10nF from pin 2 to pin 6 of the 741, i.e.
from the minus input to the output, and another, 100pF, from pin 5 to
pin 6. Pin 5 is one of two offset-null pins.

The one from pin 2 to 6 is the ordinary way to roll off the gain as
frequency rises. The one from output to pin 5 is more unusual. but
the zero offset pins certainly have a lot of gain to the output, so
they are usable for frequency response shaping. But it looks sort of
desperate. I suspect they had an unstable system, and experimented
rather than analyzing the circuit to design a good solution. I am
willing ot bet there is a better way to give good stability and also
higher frequency response (ability to regulate during load
transients).

By the way, this chain has a lot more phase shift than it could.

The
turn on bias for the transistor chain is provided by the 10k pull up
resistor above the zener diode, and this is stolen by either the
voltage regulating opamp or the current regulation opamp (whichever
pulls down more) to turn off the transistors.

yes


The first current gain stage lowers this signal source impedance from
10k to 1k, which is about right for a single stage of emitter
follower, but the second emitter follower should drive a base to
emitter resistance (across the pair of 2N3055) of something more like
100 ohms, not 1k, to speed up the turn off of those big transistors
when the upstream transistors turn off.

There is a resistor from output plus to output minus of 2.2k so we have
current also with nothing connected to the supply. What is R7 for, is it
thermal compensation. Which component doesn't look right, is it the
way in which the transistors are connected or the values of the e-b
resistors in the 2nd and 3rd stages ?

The resistor across the output provides a minimum load so the
regulation doesn't have to work all the way to zero current, where
leakage through the 2N3055s would dominate. I would have lowered the
resistor that connects base to emitter on the 2N3055, and maybe put
one base to emitter on each.

--
John Popelish

 

[Abbie]

o.k.
I have come up with some sort of d.c. analysis for the transistors, see
if you agree:

1. lets assume for simplicity that the 12V supply is 10V
Lets also assume that Vbe for our transistors is at 1V
instead of 0.6V
2. the 100 resistor from c1008 collector to 10V limits the current of
the 2sd313 to 10V/100ohm = 100mA
3. the 1k from b to e of 2sd313 limits the current through c1008 to
10V/1k = 10mA . (it's actually 1k +100, but let's ignore it)
4. the same resistor from (3) will make sure that c1008 has a minimum
of 1mA for operation of the supply with very small currents.
5. the 1k from b to e of 3055 supplies a minimum of 10mA to
2sd313 (9 of which go through the collector of 2sd313 and 1mA
through it's base to supply the minumum 1mA of c1008)
6. the R from (5) has no impact on the large currents.

What do you think ?

 

[John Popelish]

Abbie wrote:

o.k.
I have come up with some sort of d.c. analysis for the transistors, see
if you agree:

1. lets assume for simplicity that the 12V supply is 10V
Lets also assume that Vbe for our transistors is at 1V
instead of 0.6V
2. the 100 resistor from c1008 collector to 10V limits the current of
the 2sd313 to 10V/100ohm = 100mA
3. the 1k from b to e of 2sd313 limits the current through c1008 to
10V/1k = 10mA . (it's actually 1k +100, but let's ignore it)

You have to take the base to emitter drop of the 2SD313 into account.
If this voltage is 1 volt, then the current through the 1k base to
emitter resistor is limited to 1/1k = 1 ma. But the base ot emitter
path can still carry what is left of the original 100 ma limit.

4. the same resistor from (3) will make sure that c1008 has a minimum
of 1mA for operation of the supply with very small currents.

Its purpose is to make sure there is some path to drain stored charge
out of the base of the 2SD313 when it needs to turn off fast. Without
the base to emitter resistor, when the C1008 is off, its leakage
current will still be feeding a tiny current into the base of the
2SD313, and the 2SD313 will still amplify that in addition to reaction
to the base stored charge as it fades away.

5. the 1k from b to e of 3055 supplies a minimum of 10mA to
2sd313 (9 of which go through the collector of 2sd313 and 1mA
through it's base to supply the minumum 1mA of c1008)

Again, it is not there to supply a load for the preceding stage (the
base to emitter junction can conduct almost any current at a nearly
constant voltage drop), but to help reduce the amplified leakage and
give the stored charge a discharge path.

6. the R from (5) has no impact on the large currents.

Agreed.
Please add Q and R numbers, etc. to the schematic to make these
discussions more efficient. Thanks.
--
John Popelish