Where i can get the programming sequence of CoolRunner?

[chi]

Hello,

Can anyone help me to get the programming sequence of CoolRunner CPLD
to program through boundary-scan pins?

Regards,
chi

 

[Amontec Team, Laurent Gau]

chi wrote:

Hello,

Can anyone help me to get the programming sequence of CoolRunner CPLD
to program through boundary-scan pins?

Regards,
chi

I advice you to use to remote the JTAG from SVF file or a binary file of
SVF if you want to remote from an embedded processor.
SVF is a nice ASCII file format. Both XILINX and ALTERA pupose this
format. AND the format is supported by many ATPG for Boundary Scan
(Board TEST).

NOTE: the SVF is nice for downloading FPGA and CPLD or for testing PCB,
but is to heavy for debugging processor !

If your are doing a commercial product, we have build our own SVF player
(actually we can remote JTAG for any XILINX FPGA/CPLD or ALTERA FPGA).
Written in native C, we have tested it from a PC over EPP port and from
our ARM platform. (fully used by our Chameleon POD Programmer)

Contact me for more info.

Regards,
Laurent Gauch
www.amontec.com

 

[Peter Alfke]

Chi, we could not get through to your e-mail address.
Here is what I have been asked to forward to you through the newsgroup:

"Chi,
Peter Alfke forwarded your request for help on CoolRunner
programming through JTAG. Can you tell me more about what
you are trying to do ( which parts, what software, cables, etc.
that you have). I run the CPLD applications group and either
someone on my team, the Configurations Solutions team, or the
hotline can give you a hand. Tell me more and I can direct the
solution.
Jesse Jenkins, Xilinx
jesse@xilinx.com "


chi wrote:

Hello,

Can anyone help me to get the programming sequence of CoolRunner CPLD
to program through boundary-scan pins?

Regards,
chi

 

[chi]

Peter Alfke <peter@xilinx.com> wrote in message news:<3FFB529B.2EA53AE8@xilinx.com>...

Chi, we could not get through to your e-mail address.
Here is what I have been asked to forward to you through the newsgroup:

"Chi,
Peter Alfke forwarded your request for help on CoolRunner
programming through JTAG. Can you tell me more about what
you are trying to do ( which parts, what software, cables, etc.
that you have). I run the CPLD applications group and either
someone on my team, the Configurations Solutions team, or the
hotline can give you a hand. Tell me more and I can direct the
solution.
Jesse Jenkins, Xilinx
jesse@xilinx.com "

I need to program XCR3256XL and XC2C64 CPLDs'using an embedded
controller through JTAG Test Access Port. In XAPP058 application note
I have seen CoolRunner Programming Algorithm, but i need more details
like how to initialize the device, how to set the device in ISP mode
etc.,

regards,
Chi

 

[Amontec Team, Laurent Gau]

chi wrote:

Peter Alfke <peter@xilinx.com> wrote in message news:<3FFB529B.2EA53AE8@xilinx.com>...

Chi, we could not get through to your e-mail address.
Here is what I have been asked to forward to you through the newsgroup:

"Chi,
Peter Alfke forwarded your request for help on CoolRunner
programming through JTAG. Can you tell me more about what
you are trying to do ( which parts, what software, cables, etc.
that you have). I run the CPLD applications group and either
someone on my team, the Configurations Solutions team, or the
hotline can give you a hand. Tell me more and I can direct the
solution.
Jesse Jenkins, Xilinx
jesse@xilinx.com "




I need to program XCR3256XL and XC2C64 CPLDs'using an embedded
controller through JTAG Test Access Port. In XAPP058 application note
I have seen CoolRunner Programming Algorithm, but i need more details
like how to initialize the device, how to set the device in ISP mode
etc.,

regards,
Chi

ISP mode is enabled by the pin called PORT_EN, just read datasheet.

Laurent

------------ And now a word from our sponsor ---------------------
For a secure high performance FTP using SSL/TLS encryption
upgrade to SurgeFTP
---- See http://netwinsite.com/sponsor/sponsor_surgeftp.htm ----