Where do XPP290 places top-level logic when all three AREA_G

[Kelvin @ SG]

Hi, there:

I am reading the XPP290.zip for partial reconfiguration. I want to know
where
does ISE place the top level logic (as shown below) if all the three
AREA_GROUPS
don't allow boundary crossing?

Best Regards,
Kelvin





-- -----------------------------------------------------------------
-- This will help Modular Design to recognize the clock
-- It will also be pushed into IOB for better I/O performance...
-- LEDs have negative logic => use an inverter!
-- -----------------------------------------------------------------
OutputReg: process (Clock, Reset_pushbutton)
begin
if (Reset_pushbutton = '1') then
LED_A_out <= '1'; -- disable LED (negative logic)
LED_B_out <= '1';
LED_C_out <= '1';
LED_D_out <= '1';
elsif (Clock = '1' and Clock'event) then
LED_A_out <= not LED_A_signal; -- active LOW => invert the signal!
LED_B_out <= not LED_B_signal;
LED_C_out <= not LED_C_signal;
LED_D_out <= not LED_D_signal;
end if;
end process;


-- -----------------------------------------------------------------
--
-- Some confusion exists when Active and Final Assembly compilations
-- build the design. Internal FFs can be extracted from modules and
-- pushed into IOB (Output pads specifically...).
--
-- To avoid this potential problem, output registers will be created.
--
-- -----------------------------------------------------------------
OutputReg2: process (Clock, Reset_lcd_driver)
begin
if (Reset_lcd_driver = '1') then
LCD_DataBus <= (others => '0');
E <= '0';
RW <= '0';
RS <= '0';
elsif (Clock = '1' and Clock'event) then
LCD_DataBus <= LCD_DataBus_lcd;
E <= E_lcd;
RW <= RW_lcd;
RS <= RS_lcd;
end if;
end process;