Guest
Dear all,
My simulator thinks it's fine, but maxplus II gives errors on this
piece of code.
level_1_proc: process(clk)
begin
if clk'event and clk='1' then
for i in 0 to 15 loop
sum_1(i*17+16 downto i*17)<=sxt(fifo((2*i)*16+15 downto
2*i*16),17) +
sxt(fifo((2*i+1)*16+15 downto (2*i+1)*16),17); --length is 17
dif_1(i*17+16 downto i*17)<=sxt(fifo((2*i)*16+15 downto
2*i*16),17) -
sxt(fifo((2*i+1)*16+15
downto (2*i+1)*16),17); --length is 17
end loop;
end if;
end process;
As you see it's a clock sync process, but the trap has (I think)
something to do with the index of e.g. sum_1. Is it possible to do it
like i*17+16 etc? If not, are there settings in Maxplus or Quartuss II
to solve this problem?
Thanks
Peter.
My simulator thinks it's fine, but maxplus II gives errors on this
piece of code.
level_1_proc: process(clk)
begin
if clk'event and clk='1' then
for i in 0 to 15 loop
sum_1(i*17+16 downto i*17)<=sxt(fifo((2*i)*16+15 downto
2*i*16),17) +
sxt(fifo((2*i+1)*16+15 downto (2*i+1)*16),17); --length is 17
dif_1(i*17+16 downto i*17)<=sxt(fifo((2*i)*16+15 downto
2*i*16),17) -
sxt(fifo((2*i+1)*16+15
downto (2*i+1)*16),17); --length is 17
end loop;
end if;
end process;
As you see it's a clock sync process, but the trap has (I think)
something to do with the index of e.g. sum_1. Is it possible to do it
like i*17+16 etc? If not, are there settings in Maxplus or Quartuss II
to solve this problem?
Thanks
Peter.