What's the best IDE for VHDL so far ? ;)

[Skybuck Flying]

Hi,

I am used to programming in Borland Delphi. (Development environment/pascal
like language for developing microsoft windows applications).

I consider Borland Delphi to be "the creme de la creme" (=the beverly hills
of IDE's, in other words the best of the best ) of the IDE's. (Or at
least it was... (Delphi 7), Delphi 2005 is a bit slow, big and probably
unstable etc but I think that will improve in the future )

What do you consider to be the "creme de la creme" of the IDE's for VHDL ?


For example... it would be cool to have a VHDL tool which not only allows
debugging, running in realtime etc but also draws the logical gates etc ? Or
maybe timing bars etc... like high and lows etc... ?

So a preview of how the actual hardware could look like would be cool... It
would be extra cool if somehow it would be like interactive with signals
going through it etc

Bye,
Skybuck.

 

All the big FPGA/CPLD manufacturers Altera,Xilinx,Lattice offer
RTL viewers which show the generated logic.

With respect to simulation I think the "A","X","L" OEM versions of
Modelsim do a very good job.

In my opinion you do NOT need the "creme de la creme"
with regard to the tools.
It is much more important to get a feeling of "thinking" in hardware,
especially when you come from the "software corner".
To be as simple as possible describing your VHDL, that has to be the
motto.
Buy some evaluation board and try to implement
simple circuits...
And you should try to trade off whether you need a CLPD or
a FPGA.

What are you going to implement in hardware ?

Rgds
André

 

[combinational.logic $ soc]

Emacs with vhdl-mode
(http://opensource.ee.ethz.ch/emacs/vhdl-mode.html) is hands down the
best VHDL editor in my opinion. It will take a little while to get
proficient, but when you do you'll be a champion.

Use a specialized simulator for timing diagrams.

Schematic diagrams don't offer much value since the complexity of most
designs is too much to comprehend from a gate level schematic.

 

[Andy Peters]

Skybuck Flying wrote:

What do you consider to be the "creme de la creme" of the IDE's for VHDL ?

I realize that I'm feeding the troll, but I can't help myself.

No such thing ("IDE for VHDL") exists.

Simulation tools are separate from synthesis tools because they perform
very different functions.

For example... it would be cool to have a VHDL tool which not only allows
debugging, running in realtime etc but also draws the logical gates etc ? Or
maybe timing bars etc... like high and lows etc... ?

Why do you want to see the logic gates? ModelSim, for example,
provides a timing diagram view of the design, and most experienced
engineers would agree that looking at the outputs of individual AND
gates is useless.

So a preview of how the actual hardware could look like would be cool... It
would be extra cool if somehow it would be like interactive with signals
going through it etc

Most synthesis tools already provide a schematic view of their results.
And you can run a post-fitter timing simulation of your design and
look at the actual AND gates if you wish, but you'll quickly get lost
in the forest looking at the individual blades of grass.

Oh, yeah, we haven't mentioned yet that you can't ignore the vendor
place-and-route tools.

You're better off learning how real engineers work. Choose a good
editor (and there's only one choice, emacs w/VHDL mode), choose a
quality VHDL simulation tool (and there are two to choose from) and
choose a quality synthesis tool (which may be provided by your FPGA
vendor, or you can choose Synplify or Precision). In other words, you
choose the tools that do the job, rather than looking for an all-in-one
solution.

-a

 

[Eric Smith]

"Skybuck Flying" <nospam@hotmail.com> writes:

What do you consider to be the "creme de la creme" of the IDE's for VHDL ?

Emacs.