What's Nonpipelined bus mean?

[Davy]

Hi all,

I always heard Nonpipelined bus. Is any bus Nonpipelined? Or is there
Pipelined bus or other types of bus. Thanks in advance!

Best regards,
Davy

 

[rickman]

Davy wrote:

Hi all,

I always heard Nonpipelined bus. Is any bus Nonpipelined? Or is there
Pipelined bus or other types of bus. Thanks in advance!

Sure, a bus can be pipelined. In many FPGAs busses are actually a
collection of point to point connections with multiplexers. The
multiplexers can be pipelined in sections which will allow faster clock
speeds.

 

[Davy]

Hi, rickman,

Thanks!

Can you tell me what's Nonpipelined bus mean?

Best regards,
Davy

rickman wrote:

Davy wrote:
Hi all,

I always heard Nonpipelined bus. Is any bus Nonpipelined? Or is there
Pipelined bus or other types of bus. Thanks in advance!

Sure, a bus can be pipelined. In many FPGAs busses are actually a
collection of point to point connections with multiplexers. The
multiplexers can be pipelined in sections which will allow faster clock
speeds.

 

[Alex]

Davy wrote:

Hi, rickman,

Thanks!

Can you tell me what's Nonpipelined bus mean?

For non-pipelined bus, all master requests interleave with slave
responses:
Req - Resp - Req - Resp .....

In pipelined bus, master may send 1<=N<=PD requests in sequence, while
receiving responses later:
Req1 - Req2 - Req3 - Req4 - Resp1 - Resp2 - Resp3 - Resp4 ....

PD is a pipeline depth of the bus.

-Alex

 

[Davy]

Hi Alex,

Thanks a lot!

So "non-pipelined bus" is equal to "blocking transaction", Req must
need Resp return and send another Req.
And likewise, "pipelined bus" is equal to "non-blocking transaction".
Is it right?

And I think "pipelined bus" may be more complex

Best regards,
Davy

Alex wrote:

Davy wrote:
Hi, rickman,

Thanks!

Can you tell me what's Nonpipelined bus mean?

For non-pipelined bus, all master requests interleave with slave
responses:
Req - Resp - Req - Resp .....

In pipelined bus, master may send 1<=N<=PD requests in sequence, while
receiving responses later:
Req1 - Req2 - Req3 - Req4 - Resp1 - Resp2 - Resp3 - Resp4 ....

PD is a pipeline depth of the bus.

-Alex

 

[sai]

Hi,

Another variety of pipelined buses, is split bus, where the responses
can come in out-of-order fashion. Request and Responses are associated
with their identification numbers.

the transactions can be as follows

req1, req2, req3,req4,........
.........req3,req1,req4,req2

1. When the response times are different for different devices, this
bus is useful.
2. When there is definite advantage in re-ordering requests, it is
useful. for example request scheduling in SDRAMs.

-Sai

 

[bir]

I think split transaction is also supported by non-pipelined bus. But
the order is maintained in this case.


bir


sai wrote:

Hi,

Another variety of pipelined buses, is split bus, where the responses
can come in out-of-order fashion. Request and Responses are associated
with their identification numbers.

the transactions can be as follows

req1, req2, req3,req4,........
........req3,req1,req4,req2

1. When the response times are different for different devices, this
bus is useful.
2. When there is definite advantage in re-ordering requests, it is
useful. for example request scheduling in SDRAMs.

-Sai