What is wrong in this blocking assignment/execution?

Hi,

I learn blocking procedure assignment with a tutorial, which said:

1. Evaluated and assigned in a single step
2. Execution flow within the procedure is blocked until the assignment is completed
3. Evaluations of concurrent statements in the same time step are blocked
until the assignment is completed

A bad example was given:

//swap bytes in word
always @(posedge clk)
begin
word[15:8] = word[ 7:0];
word[ 7:0] = word[15:8];
end



I think that the bad example violates item 2 above, but it seems more
complicated than I first saw blocking assignment. Could you explain it to me
in more detail?


Thanks,

 

[rajeev ranjan]

On Monday, 15 September 2014 20:48:00 UTC+5:30, rxj...@gmail.com wrote:

Hi,



I learn blocking procedure assignment with a tutorial, which said:



1. Evaluated and assigned in a single step

2. Execution flow within the procedure is blocked until the assignment is completed

3. Evaluations of concurrent statements in the same time step are blocked

until the assignment is completed



A bad example was given:



//swap bytes in word

always @(posedge clk)

begin

word[15:8] = word[ 7:0];

word[ 7:0] = word[15:8];

end







I think that the bad example violates item 2 above, but it seems more

complicated than I first saw blocking assignment. Could you explain it to me

in more detail?





Thanks,

You can refer to http://www.microelectronicslab.com/KnowBase/Verilog.html for it.

 

[GaborSzakacs]

rxjwg98@gmail.com wrote:

Hi,

I learn blocking procedure assignment with a tutorial, which said:

1. Evaluated and assigned in a single step
2. Execution flow within the procedure is blocked until the assignment is completed
3. Evaluations of concurrent statements in the same time step are blocked
until the assignment is completed

A bad example was given:

//swap bytes in word
always @(posedge clk)
begin
word[15:8] = word[ 7:0];
word[ 7:0] = word[15:8];
end



I think that the bad example violates item 2 above, but it seems more
complicated than I first saw blocking assignment. Could you explain it to me
in more detail?


Thanks,

The example doesn't "violate" anything. The three points are
descriptive and tell you what happens with blocking assignments.

Your "bad" example does not swap the bytes of word, but it does behave
exactly as the three points imply. Basically at the clock edge the
process starts, and because all statements are blocking, they run
in series. i.e. first word[15:8] takes the value of word[7:0] from
before the clock edge, then word[7:0] takes the *new* value of
word[15:8] after that assignment. The effect is to *copy* the low
bits of word into the high bits, and not to swap them (word[7:0]
actually never changes value). If you ever programmed in C, you
would see this as the normal behavior of a programming language. i.e.
if you want to *swap* two registers a and b, you need a third one to
hold an intermediate value like:

c = a;
a = b;
b = c;

However in hardware, you don't need that third register to implement a
swap because flip-flops in a synchronous circuit load their new value
from the inputs that existed *before* the clock edge. And in fact with
non-blocking assignments your example would swap the halves of word:


always @(posedge clk)
begin
word[15:8] <= word[ 7:0];
word[ 7:0] <= word[15:8];
end

Here both assignments use the value of the right-hand side that existed
before the rising clock edge, and therefore word[7:0] *does* change.

--
Gabor