During a non-deterministic process step information is generated. This
information is usually the result of implementation in some step of the FPGA
(usually timing, sometimes labels or logic). This added information may be
used in a previously created step (ie simulation) . The information is
"back-annotated" and this information makes the simulation (in this case)
more accurate.
"Raghavendra" <raghurash@rediffmail.com> wrote in message
news:1776d39.0401290452.3ff67936@posting.google.com...
Hi All,
Please anyone explain in detail about back annotation.
Thanks in advance+regards,
Raghavendra
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