What is a load line - intuitively

[veek]

http://pix.toile-libre.org/?img=1493527288.png

That's a typical graph of Vce vs Ic for a bunch of Ib as provided by the
manufacturer. Is my understanding correct:

We create a loadline so that we can operate the transistor's collector ckt
in a linear fashion for a varying base input.

Basically there are an infinite set of Vce vs Ic curves for each and every
base current value possible - obviously manufacturer's can't plot all that
so they give us certain typical curves.

Q represents the DC operating point for some base current but when an input
signal is fed for amplification, the base current changes, and we basically
move to a different Vce vs Ic curve (the new Q point on this curve
represents the output for the new base current flowing as a result of
changed Ib due to signal).

Because the load line is linear, for every change in Ib we get a linear
change in Ic; if the load line was somehow a sinusoid we'd get a sinusoidal
amplification action for Ib?

 

[veek]

veek wrote:

http://pix.toile-libre.org/?img=1493527288.png

That's a typical graph of Vce vs Ic for a bunch of Ib as provided by the
manufacturer. Is my understanding correct:

We create a loadline so that we can operate the transistor's collector ckt
in a linear fashion for a varying base input.

Basically there are an infinite set of Vce vs Ic curves for each and every
base current value possible - obviously manufacturer's can't plot all that
so they give us certain typical curves.

Q represents the DC operating point for some base current but when an
input signal is fed for amplification, the base current changes, and we
basically move to a different Vce vs Ic curve (the new Q point on this
curve represents the output for the new base current flowing as a result
of changed Ib due to signal).

Because the load line is linear, for every change in Ib we get a linear
change in Ic; if the load line was somehow a sinusoid we'd get a
sinusoidal amplification action for Ib?

Also, would it be fair to say:
Once the transistor is amplifying a signal.. the Q point would wander/walk
all along the load-line and that the current Q-point position represents the
Vce*Ic output for corresponding Ib?

 

[rickman]

On 4/30/2017 12:57 AM, veek wrote:

veek wrote:

http://pix.toile-libre.org/?img=1493527288.png

That's a typical graph of Vce vs Ic for a bunch of Ib as provided by the
manufacturer. Is my understanding correct:

We create a loadline so that we can operate the transistor's collector ckt
in a linear fashion for a varying base input.

Basically there are an infinite set of Vce vs Ic curves for each and every
base current value possible - obviously manufacturer's can't plot all that
so they give us certain typical curves.

Q represents the DC operating point for some base current but when an
input signal is fed for amplification, the base current changes, and we
basically move to a different Vce vs Ic curve (the new Q point on this
curve represents the output for the new base current flowing as a result
of changed Ib due to signal).

Because the load line is linear, for every change in Ib we get a linear
change in Ic; if the load line was somehow a sinusoid we'd get a
sinusoidal amplification action for Ib?
Also, would it be fair to say:
Once the transistor is amplifying a signal.. the Q point would wander/walk
all along the load-line and that the current Q-point position represents the
Vce*Ic output for corresponding Ib?

I'm not sure of all the things you wrote, but the load line is the line
drawn *on* the Ic vs Vce curves to show the possible operating points.
With a constant power supply voltage the voltage across the load
resistor will be the difference of power supply minus Vc, so the load
line is drawn from zero current and max Vcc to zero voltage and max Ic.

Where the load line intersects the transistor curves for a given base
current is where the transistor will operate. I would not say the
operation of the transistor is necessarily linear. To see that clearly
you need to plot Ic vs Ib for a given load. In general it won't be
completely linear.

--

Rick C

 

[veek]

rickman wrote:

On 4/30/2017 12:57 AM, veek wrote:
veek wrote:

http://pix.toile-libre.org/?img=1493527288.png

That's a typical graph of Vce vs Ic for a bunch of Ib as provided by the
manufacturer. Is my understanding correct:

We create a loadline so that we can operate the transistor's collector
ckt in a linear fashion for a varying base input.

Basically there are an infinite set of Vce vs Ic curves for each and
every base current value possible - obviously manufacturer's can't plot
all that so they give us certain typical curves.

Q represents the DC operating point for some base current but when an
input signal is fed for amplification, the base current changes, and we
basically move to a different Vce vs Ic curve (the new Q point on this
curve represents the output for the new base current flowing as a result
of changed Ib due to signal).

Because the load line is linear, for every change in Ib we get a linear
change in Ic; if the load line was somehow a sinusoid we'd get a
sinusoidal amplification action for Ib?
Also, would it be fair to say:
Once the transistor is amplifying a signal.. the Q point would
wander/walk all along the load-line and that the current Q-point position
represents the Vce*Ic output for corresponding Ib?

I'm not sure of all the things you wrote, but the load line is the line
drawn *on* the Ic vs Vce curves to show the possible operating points.
With a constant power supply voltage the voltage across the load
resistor will be the difference of power supply minus Vc, so the load
line is drawn from zero current and max Vcc to zero voltage and max Ic.

Is Rc the load resistor? Normally load's Rl ..
(anyway yeah - that's the math procedure for computing loadline - plug and
chug thing]

Where the load line intersects the transistor curves for a given base
current is where the transistor will operate. I would not say the
operation of the transistor is necessarily linear. To see that clearly
you need to plot Ic vs Ib for a given load. In general it won't be
completely linear.

Ah.. so the transistor operates in a range between Qh and Ql on the load
line? For a sine wave, first half it would operate between Q and Ql? The
operating point would shift from Q to Ql and then back to Q for the zero
crossover?

 

[veek]

veek wrote:

http://pix.toile-libre.org/?img=1493527288.png

That's a typical graph of Vce vs Ic for a bunch of Ib as provided by the
manufacturer. Is my understanding correct:

We create a loadline so that we can operate the transistor's collector ckt
in a linear fashion for a varying base input.

Basically there are an infinite set of Vce vs Ic curves for each and every
base current value possible - obviously manufacturer's can't plot all that
so they give us certain typical curves.

Q represents the DC operating point for some base current but when an
input signal is fed for amplification, the base current changes, and we
basically move to a different Vce vs Ic curve (the new Q point on this
curve represents the output for the new base current flowing as a result
of changed Ib due to signal).

Because the load line is linear, for every change in Ib we get a linear
change in Ic; if the load line was somehow a sinusoid we'd get a
sinusoidal amplification action for Ib?

https://qph.ec.quoracdn.net/main-qimg-752573d7d6bc8c20319db701ddc539d3
In this graph/image:
1. Can the transistor work at A? No - right? The curved part represents a
non-linear part where Vce is not large enough to draw all electrons from the
emitter - you'd be leaving behind part of th signal (so to speak) for some
particular Ib?

2. Note the Q Point (active REGION). The transistor is active across all Ib
on the load-line?

As in: the Q point (that point on graph) is where the transistor stays when
it has no input signal because of DC biasing. When there is an input signal
the Q point moves along the load-line between A and B driven by the input
signal (assuming the signal is large enough to drive the Q point that far) -
correct?

If it goes all the way to the curved region near A - the Ic value will no
longer be proportional to Ib like it was near say where Ic=50 cuts the load
line?

 

[rickman]

On 4/30/2017 3:23 AM, veek wrote:

rickman wrote:

On 4/30/2017 12:57 AM, veek wrote:
veek wrote:

http://pix.toile-libre.org/?img=1493527288.png

That's a typical graph of Vce vs Ic for a bunch of Ib as provided by the
manufacturer. Is my understanding correct:

We create a loadline so that we can operate the transistor's collector
ckt in a linear fashion for a varying base input.

Basically there are an infinite set of Vce vs Ic curves for each and
every base current value possible - obviously manufacturer's can't plot
all that so they give us certain typical curves.

Q represents the DC operating point for some base current but when an
input signal is fed for amplification, the base current changes, and we
basically move to a different Vce vs Ic curve (the new Q point on this
curve represents the output for the new base current flowing as a result
of changed Ib due to signal).

Because the load line is linear, for every change in Ib we get a linear
change in Ic; if the load line was somehow a sinusoid we'd get a
sinusoidal amplification action for Ib?
Also, would it be fair to say:
Once the transistor is amplifying a signal.. the Q point would
wander/walk all along the load-line and that the current Q-point position
represents the Vce*Ic output for corresponding Ib?

I'm not sure of all the things you wrote, but the load line is the line
drawn *on* the Ic vs Vce curves to show the possible operating points.
With a constant power supply voltage the voltage across the load
resistor will be the difference of power supply minus Vc, so the load
line is drawn from zero current and max Vcc to zero voltage and max Ic.

Is Rc the load resistor? Normally load's Rl ..
(anyway yeah - that's the math procedure for computing loadline - plug and
chug thing]

Yes, Rc (c for collector) is the load resistor in this case.

Where the load line intersects the transistor curves for a given base
current is where the transistor will operate. I would not say the
operation of the transistor is necessarily linear. To see that clearly
you need to plot Ic vs Ib for a given load. In general it won't be
completely linear.

Ah.. so the transistor operates in a range between Qh and Ql on the load
line? For a sine wave, first half it would operate between Q and Ql? The
operating point would shift from Q to Ql and then back to Q for the zero
crossover?

I was looking at the schematic for the other post with 100 kohm and 10
kohm resistors. This one with 500 kohm base and 3 kohm collector
resistors is *not* in saturation.

I don't remember the Q point thing, at least the name. But the idea is
that the bias puts the static point somewhere which you are calling Q
and the AC signal creates the movement on the load line between Ql and
Qh. So I think you get it.

--

Rick C

 

[rickman]

On 4/30/2017 6:36 AM, veek wrote:

veek wrote:

http://pix.toile-libre.org/?img=1493527288.png

That's a typical graph of Vce vs Ic for a bunch of Ib as provided by the
manufacturer. Is my understanding correct:

We create a loadline so that we can operate the transistor's collector ckt
in a linear fashion for a varying base input.

Basically there are an infinite set of Vce vs Ic curves for each and every
base current value possible - obviously manufacturer's can't plot all that
so they give us certain typical curves.

Q represents the DC operating point for some base current but when an
input signal is fed for amplification, the base current changes, and we
basically move to a different Vce vs Ic curve (the new Q point on this
curve represents the output for the new base current flowing as a result
of changed Ib due to signal).

Because the load line is linear, for every change in Ib we get a linear
change in Ic; if the load line was somehow a sinusoid we'd get a
sinusoidal amplification action for Ib?

https://qph.ec.quoracdn.net/main-qimg-752573d7d6bc8c20319db701ddc539d3
In this graph/image:
1. Can the transistor work at A? No - right? The curved part represents a
non-linear part where Vce is not large enough to draw all electrons from the
emitter - you'd be leaving behind part of th signal (so to speak) for some
particular Ib?

I think you are referring to "working" as amplifying a signal with
linearity. No, biasing the transistor to point A will not let it swing
both ways so an input signal of any amplitude will be clipped.

But amplifying an AC signal is not the only reason to use a transistor.
There are switching uses where bias at point A would be a good idea.

2. Note the Q Point (active REGION). The transistor is active across all Ib
on the load-line?

Not sure what this implies, "active across all Ib"? There are limits to
the Ib range you can use no matter where you bias it. But yes, this
bias point will give you a good range of operation.

As in: the Q point (that point on graph) is where the transistor stays when
it has no input signal because of DC biasing. When there is an input signal
the Q point moves along the load-line between A and B driven by the input
signal (assuming the signal is large enough to drive the Q point that far) -
correct?

Yes, when you apply an input signal the collector voltage moves across
the load line.

If it goes all the way to the curved region near A - the Ic value will no
longer be proportional to Ib like it was near say where Ic=50 cuts the load
line?

Yes, it only has to get close and the non-linearity gets bad.

--

Rick C

 

[veek]

rickman wrote:

On 4/30/2017 3:23 AM, veek wrote:
rickman wrote:

On 4/30/2017 12:57 AM, veek wrote:
veek wrote:

http://pix.toile-libre.org/?img=1493527288.png

That's a typical graph of Vce vs Ic for a bunch of Ib as provided by
the manufacturer. Is my understanding correct:

We create a loadline so that we can operate the transistor's collector
ckt in a linear fashion for a varying base input.

Basically there are an infinite set of Vce vs Ic curves for each and
every base current value possible - obviously manufacturer's can't
plot all that so they give us certain typical curves.

Q represents the DC operating point for some base current but when an
input signal is fed for amplification, the base current changes, and
we basically move to a different Vce vs Ic curve (the new Q point on
this curve represents the output for the new base current flowing as a
result of changed Ib due to signal).

Because the load line is linear, for every change in Ib we get a
linear change in Ic; if the load line was somehow a sinusoid we'd get
a sinusoidal amplification action for Ib?
Also, would it be fair to say:
Once the transistor is amplifying a signal.. the Q point would
wander/walk all along the load-line and that the current Q-point
position represents the Vce*Ic output for corresponding Ib?

I'm not sure of all the things you wrote, but the load line is the line
drawn *on* the Ic vs Vce curves to show the possible operating points.
With a constant power supply voltage the voltage across the load
resistor will be the difference of power supply minus Vc, so the load
line is drawn from zero current and max Vcc to zero voltage and max Ic.

Is Rc the load resistor? Normally load's Rl ..
(anyway yeah - that's the math procedure for computing loadline - plug
and chug thing]

Yes, Rc (c for collector) is the load resistor in this case.


Where the load line intersects the transistor curves for a given base
current is where the transistor will operate. I would not say the
operation of the transistor is necessarily linear. To see that clearly
you need to plot Ic vs Ib for a given load. In general it won't be
completely linear.

Ah.. so the transistor operates in a range between Qh and Ql on the load
line? For a sine wave, first half it would operate between Q and Ql? The
operating point would shift from Q to Ql and then back to Q for the zero
crossover?

I was looking at the schematic for the other post with 100 kohm and 10
kohm resistors. This one with 500 kohm base and 3 kohm collector
resistors is *not* in saturation.

I don't remember the Q point thing, at least the name. But the idea is
that the bias puts the static point somewhere which you are calling Q
and the AC signal creates the movement on the load line between Ql and
Qh. So I think you get it.

cool - thanks!

 

[John Larkin]

On Sun, 30 Apr 2017 10:24:17 +0530, veek <vek.m1234@gmail.com> wrote:

http://pix.toile-libre.org/?img=1493527288.png

That's a typical graph of Vce vs Ic for a bunch of Ib as provided by the
manufacturer. Is my understanding correct:

We create a loadline so that we can operate the transistor's collector ckt
in a linear fashion for a varying base input.

Basically there are an infinite set of Vce vs Ic curves for each and every
base current value possible - obviously manufacturer's can't plot all that
so they give us certain typical curves.

Q represents the DC operating point for some base current but when an input
signal is fed for amplification, the base current changes, and we basically
move to a different Vce vs Ic curve (the new Q point on this curve
represents the output for the new base current flowing as a result of
changed Ib due to signal).

Because the load line is linear, for every change in Ib we get a linear
change in Ic; if the load line was somehow a sinusoid we'd get a sinusoidal
amplification action for Ib?

If you're designing a linear transistor amplifier, you usually don't
need to think about load lines. Just assume that static collector
current will be constant at some value, and pick the collector
resistor accordingly, typically to park midway between VCC and
transistor saturation.

Tubes, especially triodes, had very slopey plate curves, and load line
analysis was one easy way to define the operating point.

And sure, if the collector load is nonlinear, the gain will be
nonlinear.


--

John Larkin Highland Technology, Inc

lunatic fringe electronics

 

[John Larkin]

On Sun, 30 Apr 2017 16:06:13 +0530, veek <vek.m1234@gmail.com> wrote:

veek wrote:

http://pix.toile-libre.org/?img=1493527288.png

That's a typical graph of Vce vs Ic for a bunch of Ib as provided by the
manufacturer. Is my understanding correct:

We create a loadline so that we can operate the transistor's collector ckt
in a linear fashion for a varying base input.

Basically there are an infinite set of Vce vs Ic curves for each and every
base current value possible - obviously manufacturer's can't plot all that
so they give us certain typical curves.

Q represents the DC operating point for some base current but when an
input signal is fed for amplification, the base current changes, and we
basically move to a different Vce vs Ic curve (the new Q point on this
curve represents the output for the new base current flowing as a result
of changed Ib due to signal).

Because the load line is linear, for every change in Ib we get a linear
change in Ic; if the load line was somehow a sinusoid we'd get a
sinusoidal amplification action for Ib?

https://qph.ec.quoracdn.net/main-qimg-752573d7d6bc8c20319db701ddc539d3
In this graph/image:
1. Can the transistor work at A? No - right? The curved part represents a
non-linear part where Vce is not large enough to draw all electrons from the
emitter - you'd be leaving behind part of th signal (so to speak) for some
particular Ib?

2. Note the Q Point (active REGION). The transistor is active across all Ib
on the load-line?

As in: the Q point (that point on graph) is where the transistor stays when
it has no input signal because of DC biasing. When there is an input signal
the Q point moves along the load-line between A and B driven by the input
signal (assuming the signal is large enough to drive the Q point that far) -
correct?

If it goes all the way to the curved region near A - the Ic value will no
longer be proportional to Ib like it was near say where Ic=50 cuts the load
line?

Two small points:

Beta is poorly controlled, so using Ib to set Ic is hazardous. One
generally designs a circuit to force some desired Ic indepentent of
beta.

"Q-point" is, I think, an amateur audio term. We talk about bias
current and collector voltage. Or more generally, maybe bias point.




--

John Larkin Highland Technology, Inc

lunatic fringe electronics

 

[Ralph Mowery]

In article <f5jcgcpvthiri2fbk89b392giojaeerfbm@4ax.com>,
jjlarkin@highlandtechnology.com says...

Two small points:

Beta is poorly controlled, so using Ib to set Ic is hazardous. One
generally designs a circuit to force some desired Ic indepentent of
beta.

"Q-point" is, I think, an amateur audio term. We talk about bias
current and collector voltage. Or more generally, maybe bias point.

Beta is often not very quality controlled. Often the values of the
passive components are set so that beta does not play much of a part as
long as it is enough.

Q-Point has been used to describe a point for many simiconuctors, and
not just transistors for over 50 years. Referred to a shortened
"quiescent point". It is often near the middle of a transistor load
line. It is a point where when a signal changes from a larger current to
a smaller one, or the other way depending on the signal. For example in
a transistor if you have no signal the transistor will put out a certain
current. If you put a sine wave signal to it, over the positive part of
the cycle the transistor will draw more current and the negative part it
will draw less current.

Q can be used in electronics to describe how sharp a resonate circuit is
in simple terms.

For hams there is a a list of what is called Q signals. Usually 3
letters starting with Q. It was really started by commercial stations
as a short form of statements or questions as everything was sent by
Morse code and at a speed of about 20 words per minuit it was slow to
get messages through. For example it is lots faster to send QRO
instead of telling the other station to increase power or asking if I
should increase power.

..