What graphical entry/documentation tools?

[jamesp]

Hi,

I am a mature student will be doing some complex VHDL and Verilog design
work for my course. As well as having to create and test the
functionality of the design (in both languages) I want to document how
the design is put together and it's complex hierarchy.

Is there anything out there that will allow me to represent my design in
some sort of hierarchical functional blocks to use as a documentation
tool? As I want to use both languages for the design something that
ideally can accommodate VHDL and Verilog.

I am happy using my normal editing system for the code design so I don't
want a 'block-to-code' type of system.

Thanks for your help.

James.

 

[Brian]

jamesp wrote:

Hi,

I am a mature student will be doing some complex VHDL and Verilog design
work for my course. As well as having to create and test the
functionality of the design (in both languages) I want to document how
the design is put together and it's complex hierarchy.

Is there anything out there that will allow me to represent my design in
some sort of hierarchical functional blocks to use as a documentation
tool? As I want to use both languages for the design something that
ideally can accommodate VHDL and Verilog.

I am happy using my normal editing system for the code design so I don't
want a 'block-to-code' type of system.

Thanks for your help.

James.

Hi James,

We have a tool which we believe will address your questions. There is a
15 day fully functional evaluation download available on the web site so
please feel free to try it out.

www.expressivesystems.com

--

Cheers
Brian
___________________________________
Expressive Systems.
www.expressivesystems.com

 

See link
http://groups.google.co.uk/group/comp.lang.vhdl/browse_thread/thread/79c27bc48d819a97/0eae7974001d4e53#0eae7974001d4e53

 

[Hans]

Hi James,

Have a look at Mentor's HDL Designer. It has a lot of graphical design entry
methods like block diagrams, graphical FSM (+ animation during simulation if
you have Modelsim), flow charts, IBD (spreadsheet like entry method) etc It
now also includes a design checker (ex Design Analyst). It supports OLE so
you can drag and drop diagrams into Office products (not the open flavour
. It also supports export to HTML including all your side data (scripts,
pdf documents etc).

You might also want to look at tools similar to Java-Doc to automatically
create documentation,

Hans
www.ht-lab.com



"jamesp" <jamesp@no.email.address.com> wrote in message
news:dn90qh$8m3$1@news7.svr.pol.co.uk...

Hi,

I am a mature student will be doing some complex VHDL and Verilog design
work for my course. As well as having to create and test the functionality
of the design (in both languages) I want to document how the design is put
together and it's complex hierarchy.

Is there anything out there that will allow me to represent my design in
some sort of hierarchical functional blocks to use as a documentation
tool? As I want to use both languages for the design something that
ideally can accommodate VHDL and Verilog.

I am happy using my normal editing system for the code design so I don't
want a 'block-to-code' type of system.

Thanks for your help.

James.