What are differences between IBUF and IBUFDS inferred and im

If a design has differential inputs, but the synthesis tool did not infer differential input buffers IBUFDS on Xilinx FPGA for them, IBUFs are inferred instead. What will be the impact to the implementation? Thanks!

 

[RCIngham]

If a design has differential inputs, but the synthesis tool did not infe
differential input buffers IBUFDS on Xilinx FPGA for them, IBUFs ar

inferred instead. What will be the impact to the implementation? Thanks!
Try it!
If Mapping fails, you will have to instantialte them somewher
appropriate.


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Firstly, unless there is some newer info out there, I believe that per the Xilinx HDL libraries guide, an IBUFDS must be instantiated and cannot be inferred. The IBUFDS primitive and its functionality is located up in the I/O cell and performs the differential to single ended conversion directly.

I will presume that your code to infer the differential to single-ended conversion matches the functionality of the IBUFDS logic table in the HDL library guide. As such with the IBUFs at the I/O cell, the synthesizer will then try to replicate the functionality using logic cell(s). A significant performance hit will occur do to the delays. These delays will change from iteration to iteration as well. Also there will be more susceptibility to glitching because it will be more challenging to match the routing of the two signals in and amongst the logic cell fabric.

Regards,
Carlton