What about local params in classes

  • Thread starter parag_paul@hotmail.com
  • Start date
P

parag_paul@hotmail.com

Guest
Is it meaning full to have local params in SV class

SV - System Verilog
 
On Wed, 10 Dec 2008 04:12:50 -0800 (PST), parag_paul wrote:

Is it meaning full to have local params in SV class
According to the LRM, it's illegal. You probably
want to use a static const instead.

At least one simulator tolerates parameters and
localparams in classes. I can't really see what's
wrong with having them, but it's probably not very
helpful either.

Note that the simulator that does accept localparam
inside a class also accepts "parameter", but treats
it the same as "localparam" - in other words, you
can't override the parameter on instantiation. So:

class C #(parameter P = 5);
localparam L = 3;
parameter LP = 2;
endclass

C #(4) c = new; // parameter P = 4
C #(6, 7) d; // illegal, can't override LP

I have a vague feeling that the rules for this may
have slightly changed in the proposed 2009 standard,
but I'm not sure - I'll check some time soon.
--
Jonathan Bromley, Consultant

DOULOS - Developing Design Know-how
VHDL * Verilog * SystemC * e * Perl * Tcl/Tk * Project Services

Doulos Ltd., 22 Market Place, Ringwood, BH24 1AW, UK
jonathan.bromley@MYCOMPANY.com
http://www.MYCOMPANY.com

The contents of this message may contain personal views which
are not the views of Doulos Ltd., unless specifically stated.
 
On Sun, 14 Dec 2008 20:36:05 +0000, Jonathan Bromley wrote:

Is it meaning full to have local params in SV class

According to the LRM, it's illegal. You probably
want to use a static const instead.
[...]
I have a vague feeling that the rules for this may
have slightly changed in the proposed 2009 standard,
Indeed they have. The current draft of SV-2009
permits localparam and parameter inside a class.
In both cases you get a local parameter; if you
want to parameterize (template) the class, you
must put the corresponding parameter(s) in the
class declaration header.

This may be useful, because (as far as I understand)
parameters are constant expressions whereas
const variables are not.
--
Jonathan Bromley, Consultant

DOULOS - Developing Design Know-how
VHDL * Verilog * SystemC * e * Perl * Tcl/Tk * Project Services

Doulos Ltd., 22 Market Place, Ringwood, BH24 1AW, UK
jonathan.bromley@MYCOMPANY.com
http://www.MYCOMPANY.com

The contents of this message may contain personal views which
are not the views of Doulos Ltd., unless specifically stated.
 

Welcome to EDABoard.com

Sponsor

Back
Top