E
Edwin Naroska
Guest
Posted-By: auto-faq 3.3 (Perl 5.008)
This posting explains some ways to get the FAQ (Frequently Asked
Questions) of the newsgroup comp.lang.vhdl:
Besides of the monthly postings the FAQ is also available by
www at "http://www.vhdl.org/comp.lang.vhdl/" or
"http://www.eda.org/comp.lang.vhdl/" or
ftp on "vhdl.org /pub/comp.lang.vhdl/FAQ*" see VHDL
International for details on accessing the server
or send me a note to get a copy via e-mail. Further, all parts of the
FAQ are available in HTML format and PDF format (better suited for
printing).
The FAQ consists of *four* parts:
Part 1: FAQ General (contacts, etc.)
Part 2: Lists of Books on VHDL
Part 3: Lists of Products & Services (PD+commercial)
Part 4: VHDL Glossary
Part 4 is an ASCII representation of Annex B (Glossary) of the
IEEE Std 1076-1993 IEEE Standard VHDL Language Reference Manual. This
glossary contains brief, informal descriptions for a number of terms
and phrases used to define VHDL. Additionally, it includes some
examples to illustrate various definitions.
The following link points to a HTML version of the glossary using
frames
http://www.vhdl.org/comp.lang.vhdl/html3/gloss_fr.html .
A version without frames is at
http://www.vhdl.org/comp.lang.vhdl/FAQ4.html .
For a chronological list of changes made to the FAQ see below.
Bye,...
Edwin
--------------------------------------------------------------------
Dr.-Ing. Edwin Naroska phone: ++49 231 7552406
Computer Engineering Institute fax: ++49 231 7553251
(Lehrstuhl fuer Datenverarbeitungssysteme)
University of Dortmund, 44221 Dortmund, Germany
--------------------------------------------------------------------
FAQ comp.lang.vhdl history (last 3 months)
Nov 2003
* Part 1 and 2: various typos fixed; special thanks to Colin Paul
Gloster for spotting them
* Part 1, new Section 4.2.24 "How to Print Integer/Floatingpoint
Values to the Screen" (links to Section 4.2.23)
* Part 3, Section 5.2: new entry for the HDL Hierarchy Manager by
Prime Technology Limited added
* Part 1, Section 4.1: an overview of changes to VHDL planned by the
VHDL-200X, IEEE 1164, and IEEE 1076.3 working groups can be
downloaded from http://www.synthworks.com/papers/
* Part 1, Section 4.2.21: flaw in sample code fixed (thanks to
Anders Boström for finding it)
* Part 1, Section 4.8.1 and 4.11: link to web page comparing
conversion functions defined in std_logic_arith and numeric_std
added (http://dz.ee.ethz.ch/support/ic/vhdl/vhdlsources.en.html)
* Part 3, Section 2: entry for Chronology Division of Forte Design
Systems added
* Part 1, Section 4.10: link to random generator added
(http://www.janick.bergeron.com/wtb/packages/random1.vhd)
* Part 3, Section 1.2 and 3.1: link for tools VDT and INSPIRE
updated
* Part 3, Section 1.5: entry for CDFG (Control-Data Flow Graph)
Toolset added (http://poppy.snu.ac.kr/CDFG/index.html)
Aug 2003
* Part 2, Section 2.8: recommendation counters updated
* Part 1, Section 4.10: link to CAN controller core from opencores
added (http://www.opencores.org/projects/can/)
* Part 3, Section 5.1: JBDE a block/bubble diagram-editing tool
which is cabable of generating VHDL code is available from
http://www.valil.com/jbde/
* Part 1, Section 4.10: another synthesizable fixed point arithmetic
package written by Jonathan Bromley can be downloaded from
(http://www.doulos.co.uk/knowhow/vhdl_models/fp_arith/)
* Part 1, Section 4.2.12: text extended to emphasize that package
TextIO is not for synthesis
Jun 2003
* Part 2, Section 2.8: recommendation counters updated
* Part 1, Section 4.2.40: text updated
* Part 1: links updated
* Part 1, Section : links to uP1232 (a 8-bit FPGA-based
microprocessor core;
http://www.dte.eis.uva.es/OpenProjects/OpenUP/index.htm),
DRAGONFLY microprocessor core
(http://www.leox.org/resources/dvlp.html#RES_DVLP_DGF), an 8-bit
Stack Processor
(http://www.compusmart.ab.ca/rc/Papers/8bitprocessor/stackproc.htm
l) and JOP (a Java Optimized Processor;
http://www.jopdesign.com/download.jsp) added
This posting explains some ways to get the FAQ (Frequently Asked
Questions) of the newsgroup comp.lang.vhdl:
Besides of the monthly postings the FAQ is also available by
www at "http://www.vhdl.org/comp.lang.vhdl/" or
"http://www.eda.org/comp.lang.vhdl/" or
ftp on "vhdl.org /pub/comp.lang.vhdl/FAQ*" see VHDL
International for details on accessing the server
or send me a note to get a copy via e-mail. Further, all parts of the
FAQ are available in HTML format and PDF format (better suited for
printing).
The FAQ consists of *four* parts:
Part 1: FAQ General (contacts, etc.)
Part 2: Lists of Books on VHDL
Part 3: Lists of Products & Services (PD+commercial)
Part 4: VHDL Glossary
Part 4 is an ASCII representation of Annex B (Glossary) of the
IEEE Std 1076-1993 IEEE Standard VHDL Language Reference Manual. This
glossary contains brief, informal descriptions for a number of terms
and phrases used to define VHDL. Additionally, it includes some
examples to illustrate various definitions.
The following link points to a HTML version of the glossary using
frames
http://www.vhdl.org/comp.lang.vhdl/html3/gloss_fr.html .
A version without frames is at
http://www.vhdl.org/comp.lang.vhdl/FAQ4.html .
For a chronological list of changes made to the FAQ see below.
Bye,...
Edwin
--------------------------------------------------------------------
Dr.-Ing. Edwin Naroska phone: ++49 231 7552406
Computer Engineering Institute fax: ++49 231 7553251
(Lehrstuhl fuer Datenverarbeitungssysteme)
University of Dortmund, 44221 Dortmund, Germany
--------------------------------------------------------------------
FAQ comp.lang.vhdl history (last 3 months)
Nov 2003
* Part 1 and 2: various typos fixed; special thanks to Colin Paul
Gloster for spotting them
* Part 1, new Section 4.2.24 "How to Print Integer/Floatingpoint
Values to the Screen" (links to Section 4.2.23)
* Part 3, Section 5.2: new entry for the HDL Hierarchy Manager by
Prime Technology Limited added
* Part 1, Section 4.1: an overview of changes to VHDL planned by the
VHDL-200X, IEEE 1164, and IEEE 1076.3 working groups can be
downloaded from http://www.synthworks.com/papers/
* Part 1, Section 4.2.21: flaw in sample code fixed (thanks to
Anders Boström for finding it)
* Part 1, Section 4.8.1 and 4.11: link to web page comparing
conversion functions defined in std_logic_arith and numeric_std
added (http://dz.ee.ethz.ch/support/ic/vhdl/vhdlsources.en.html)
* Part 3, Section 2: entry for Chronology Division of Forte Design
Systems added
* Part 1, Section 4.10: link to random generator added
(http://www.janick.bergeron.com/wtb/packages/random1.vhd)
* Part 3, Section 1.2 and 3.1: link for tools VDT and INSPIRE
updated
* Part 3, Section 1.5: entry for CDFG (Control-Data Flow Graph)
Toolset added (http://poppy.snu.ac.kr/CDFG/index.html)
Aug 2003
* Part 2, Section 2.8: recommendation counters updated
* Part 1, Section 4.10: link to CAN controller core from opencores
added (http://www.opencores.org/projects/can/)
* Part 3, Section 5.1: JBDE a block/bubble diagram-editing tool
which is cabable of generating VHDL code is available from
http://www.valil.com/jbde/
* Part 1, Section 4.10: another synthesizable fixed point arithmetic
package written by Jonathan Bromley can be downloaded from
(http://www.doulos.co.uk/knowhow/vhdl_models/fp_arith/)
* Part 1, Section 4.2.12: text extended to emphasize that package
TextIO is not for synthesis
Jun 2003
* Part 2, Section 2.8: recommendation counters updated
* Part 1, Section 4.2.40: text updated
* Part 1: links updated
* Part 1, Section : links to uP1232 (a 8-bit FPGA-based
microprocessor core;
http://www.dte.eis.uva.es/OpenProjects/OpenUP/index.htm),
DRAGONFLY microprocessor core
(http://www.leox.org/resources/dvlp.html#RES_DVLP_DGF), an 8-bit
Stack Processor
(http://www.compusmart.ab.ca/rc/Papers/8bitprocessor/stackproc.htm
l) and JOP (a Java Optimized Processor;
http://www.jopdesign.com/download.jsp) added