Warnings

K

Kausi

Guest
Hi,

Iam to execute the following code- but its throws a warning which is
preventing an expected simulation result. Any guesses why is it
happening. Iam new to verilog. Find my code snipet below-

module BCD2SevenSeg ( BCD_L, BCD_H, Segment1, Segment2 );

input [3:0] BCD_L;
input [1:0] BCD_H;
output [6:0] Segment1;
output [6:0] Segment2;
reg [6:0] Segment1;
reg [6:0] Segment2;
initial
begin
Segment1=7'b0111111;
Segment2=7'b0111111;
end
always @(BCD_H,BCD_L)

begin



case(BCD_L)
4'b0000 : Segment1=7'b1000000;
4'b0001 : Segment1=7'b1111001;
4'b0010 : Segment1=7'b0100100;
4'b0011 : Segment1=7'b0110000;
4'b0100 : Segment1=7'b0011011;
4'b0101 : Segment1=7'b0010010;
4'b0110 : Segment1=7'b0000010;
4'b0111 : Segment1=7'b0111000;
4'b1000 : Segment1=7'b0000000;
4'b1001 : Segment1=7'b0010000;
default : Segment1=7'b1001001;
endcase

case(BCD_H)
2'b00 : Segment1=7'b1000000;
2'b01 : Segment1=7'b1111001;
2'b10 : Segment1=7'b0100100;
2'b11 : Segment1=7'b0110000;
default : Segment1=7'b1001001;
endcase
end
endmodule


The warning is get is the following-

Warning: Output pins are stuck at VCC or GND
Warning (13410): Pin "Segment1[1]" is stuck at GND
Warning (13410): Pin "Segment2[6]" is stuck at GND
Warning (13410): Pin "Segment2[5]" is stuck at VCC
Warning (13410): Pin "Segment2[4]" is stuck at VCC
Warning (13410): Pin "Segment2[3]" is stuck at VCC
Warning (13410): Pin "Segment2[2]" is stuck at VCC
Warning (13410): Pin "Segment2[1]" is stuck at VCC
Warning (13410): Pin "Segment2[0]" is stuck at VCC
 
On Sat, 11 Oct 2008 15:56:20 -0700 (PDT), Kausi
<kauser.johar@gmail.com> wrote:

module BCD2SevenSeg ( BCD_L, BCD_H, Segment1, Segment2 );

input [3:0] BCD_L;
input [1:0] BCD_H;
output [6:0] Segment1;
output [6:0] Segment2;
reg [6:0] Segment1;
reg [6:0] Segment2;
initial
begin
Segment1=7'b0111111;
Segment2=7'b0111111;
end
always @(BCD_H,BCD_L)

begin



case(BCD_L)
4'b0000 : Segment1=7'b1000000;
4'b0001 : Segment1=7'b1111001;
4'b0010 : Segment1=7'b0100100;
4'b0011 : Segment1=7'b0110000;
4'b0100 : Segment1=7'b0011011;
4'b0101 : Segment1=7'b0010010;
4'b0110 : Segment1=7'b0000010;
4'b0111 : Segment1=7'b0111000;
4'b1000 : Segment1=7'b0000000;
4'b1001 : Segment1=7'b0010000;
default : Segment1=7'b1001001;
endcase

case(BCD_H)
2'b00 : Segment1=7'b1000000;
2'b01 : Segment1=7'b1111001;
2'b10 : Segment1=7'b0100100;
2'b11 : Segment1=7'b0110000;
default : Segment1=7'b1001001;
endcase
end
endmodule


The warning is get is the following-

Warning: Output pins are stuck at VCC or GND
Warning (13410): Pin "Segment1[1]" is stuck at GND
Warning (13410): Pin "Segment2[6]" is stuck at GND
Warning (13410): Pin "Segment2[5]" is stuck at VCC
Warning (13410): Pin "Segment2[4]" is stuck at VCC
Warning (13410): Pin "Segment2[3]" is stuck at VCC
Warning (13410): Pin "Segment2[2]" is stuck at VCC
Warning (13410): Pin "Segment2[1]" is stuck at VCC
Warning (13410): Pin "Segment2[0]" is stuck at VCC
Click to expand...
You're not assigning Segment2 in the always block at all and you're
decoding all 4 values of BCH_H in the second case so Segment1[1] is
stuck to GND (ie 0). Is it possible by any chance that you want to
assign to Segment2 in the BCD_H case?
Muzaffer Kal
ASIC/FPGA Design Services
DSPIA INC.
http://www.dspia.com
 
Oh yes. I completely overlooked that. It was a result of copy pasting.
 
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