warning when using design compiler

S

sravan reddy

Guest
hai,

when i am compiling my SYSTEMC code with design compiler
i am getting the following warnings

Warning : No sequential cell of target library has synchronous
set/reset inputs as required by cell 'out1_reg/out1_reg[24]' (OPT-601)

and

Warning: Unable to find net instance 'generate/loop_11/n43' in design
'count'. (DDB-95)


if any one know how to handle this issues plz help me
 

Welcome to EDABoard.com

Sponsor

Back
Top