M
Manjari
Guest
I am using BSIM4 models to design my circuit. When I simulate, a warning
msg saying " Missing bulk-drain diode would be forward biased." apears.
The transistor is in the linear region with source and drain and bulk at 0
and gate at Vdd. I read somewhere that this is because the parameter IS is
being set to 0, and thus the diodes are being open ciruited. So why is
this happening and how do I make sure that this doesnt happen?
Thanx
msg saying " Missing bulk-drain diode would be forward biased." apears.
The transistor is in the linear region with source and drain and bulk at 0
and gate at Vdd. I read somewhere that this is because the parameter IS is
being set to 0, and thus the diodes are being open ciruited. So why is
this happening and how do I make sure that this doesnt happen?
Thanx