Virtex5 MGT signals as standard diff ports

[Bartek]

Hi,

I'm considering buying Virtex5 FXT70 minimodule board which has many I/Os.
But I' confused whether MGT signals (JXx_MGTRXx_P and JXx_MGTRXx_N) on
EXP connector can be configured as 2.5V standard LVDS signals?

If yes please explain me how to do that.

Link to boards documentation:
http://www.em.avnet.com/evk/home/0,1707,RID%253D0%2526CID%253D55729%2526CCD%253DUSA%2526SID%253D32214%2526DID%253DDF2%2526LID%253D32232%2526PRT%253D0%2526PVW%253D%2526BID%253DDF2%2526CTP%253DEVK,00.html

Regards,
Bartek

 

[Ed McGettigan]

On Sep 23, 6:47 am, Bartek <misi...@onet.eu> wrote:

Hi,

I'm considering buying Virtex5 FXT70 minimodule board which has many I/Os..
But I' confused whether MGT signals (JXx_MGTRXx_P and JXx_MGTRXx_N) on
EXP connector can be configured  as 2.5V standard LVDS signals?

If yes please explain me how to do that.

Link to boards documentation:http://www.em.avnet.com/evk/home/0,1707,RID%253D0%2526CID%253D55729%2...

Regards,
Bartek

No you cannot do this. The MGT IO pins are dedicated resources.

Ed McGettigan
--
Xilinx Inc.