Virtex2PV20 programming failed, DONE pin doesn't go HIGH

Q

qudhs

Guest
Hi!
I am using a Virtex2PV20, and one PPC core is used in my design.
I drag a PPC Jtag controller core into the design in order to debug my
SW code. however, I failed to program the device with the generated
bitstream. iMPACT reports the DONE pin doesn't go high. In Bitgen, Jtag
clock has been explicitly specified. I think the main reason of
programming failure is that some wrong options were selected in Bitgen
phase due to the fact that I am not familiar with how JTAG works. could
someone guide me how to work out the problem?
thank you!
BRs.
--yang
 
You need to add both PPC in your device to JTAGPPC as documented on pg.
117ff in the "PowerPC 405 Processor Block Reference Guide".

- Peter


qudhs wrote:
Hi!
I am using a Virtex2PV20, and one PPC core is used in my design.
I drag a PPC Jtag controller core into the design in order to debug my
SW code. however, I failed to program the device with the generated
bitstream. iMPACT reports the DONE pin doesn't go high. In Bitgen, Jtag
clock has been explicitly specified. I think the main reason of
programming failure is that some wrong options were selected in Bitgen
phase due to the fact that I am not familiar with how JTAG works. could
someone guide me how to work out the problem?
thank you!
BRs.
--yang
Click to expand...
 
I think i am having the same problem. Can someone clarify these
instructions a little more on how to fix this issue.

Thanks

Matt

On Wed, 7 Apr 2004, Peter Ryser wrote:

You need to add both PPC in your device to JTAGPPC as documented on pg.
117ff in the "PowerPC 405 Processor Block Reference Guide".

- Peter


qudhs wrote:
Hi!
I am using a Virtex2PV20, and one PPC core is used in my design.
I drag a PPC Jtag controller core into the design in order to debug my
SW code. however, I failed to program the device with the generated
bitstream. iMPACT reports the DONE pin doesn't go high. In Bitgen, Jtag
clock has been explicitly specified. I think the main reason of
programming failure is that some wrong options were selected in Bitgen
phase due to the fact that I am not familiar with how JTAG works. could
someone guide me how to work out the problem?
thank you!
BRs.
--yang
Click to expand...
 
Matthew,

answer record 4582 provides some more information and even design
examples for different EDK versions. See
http://support.xilinx.com/xlnx/xil_ans_display.jsp?iLanguageID=1&iCountryID=1&getPagePath=4582

- Peter


Matthew E Rosenthal wrote:
I think i am having the same problem. Can someone clarify these
instructions a little more on how to fix this issue.

Thanks

Matt

On Wed, 7 Apr 2004, Peter Ryser wrote:


You need to add both PPC in your device to JTAGPPC as documented on pg.
117ff in the "PowerPC 405 Processor Block Reference Guide".

- Peter


qudhs wrote:

Hi!
I am using a Virtex2PV20, and one PPC core is used in my design.
I drag a PPC Jtag controller core into the design in order to debug my
SW code. however, I failed to program the device with the generated
bitstream. iMPACT reports the DONE pin doesn't go high. In Bitgen, Jtag
clock has been explicitly specified. I think the main reason of
programming failure is that some wrong options were selected in Bitgen
phase due to the fact that I am not familiar with how JTAG works. could
someone guide me how to work out the problem?
thank you!
BRs.
--yang
Click to expand...
 
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