VHDL vs. Verilog

[Pawel]

Hello All

Can anybody give me link to the discussion on
advantages and disadvantages on using VHDL and
Verilog?
The selection should be constrained only to the
digital hardware.

Thanks in advance
Pawel

 

[Kai Harrekilde-Petersen]

Pawel <NoSpam_kwartapaw@poczta.onet.pl> writes:

Hello All

Can anybody give me link to the discussion on
advantages and disadvantages on using VHDL and
Verilog?

To paraphrase an earlier response:

Verilog was designed by a bunch of hardware guys who didn't know a
thing about designing software. We had to beat on it before we could
make any real work with it.

VHDL was designed by a bunch of software guys who didn't know a thing
about designing hardware. We had to beat on it before we could make
any real work with it.


Kai
--
Kai Harrekilde-Petersen <khp(at)harrekilde(dot)dk>

 

[Pawel]

To paraphrase an earlier response:

Verilog was designed by a bunch of hardware guys who didn't know a
thing about designing software. We had to beat on it before we could
make any real work with it.

VHDL was designed by a bunch of software guys who didn't know a thing
about designing hardware. We had to beat on it before we could make
any real work with it.

He he, I like that. However, it does not help me, does it?

cheers
Pawel

 

[Pawel]

Here I found a good one:

http://groups-beta.google.com/group/comp.lang.vhdl/browse_thread/thread/4bdeb69ef2f16dac/186b2b45950a74ff?q=VHDL++Verilog&rnum=10#186b2b45950a74ff

cheers
Pawel

 

Try googling this forum. There have been many discussions on that
topic.

Rgds
André

Pawel schrieb:

Hello All

Can anybody give me link to the discussion on
advantages and disadvantages on using VHDL and
Verilog?
The selection should be constrained only to the
digital hardware.

Thanks in advance
Pawel