S
SuSenSa08
Guest
Hi all,
I have the following VHDL codes:
-- FSM definition
type pre_statetype is (wait_high, wait_hold);
signal pre_state : pre_statetype;
-- one-hot FSM encoding
attribute enum_encoding : string;
attribute enum_encoding of pre_statetype : type is "000001 000010
000100 001000 010000 100000";
Synplify Pro 8.8 does not complain about it but Synopsys
design_compiler -xg mode 2007.03 does as shown below:
Information: Building the design 'prelaunch'. (HDL-193)
Error: prelaunch.vhd:37: The number of enum encodings given does not
match the number of literals. (ELAB-341)
*** Presto compilation terminated with 1 errors. ***
Warning: Unable to resolve reference 'prelaunch_pulse_gen' in
'decoder_asic'. (LINK-5)
1
Why are the tools different ? Is the error fatal, i.e. need a fix ?
Thanks,
Calvin
I have the following VHDL codes:
-- FSM definition
type pre_statetype is (wait_high, wait_hold);
signal pre_state : pre_statetype;
-- one-hot FSM encoding
attribute enum_encoding : string;
attribute enum_encoding of pre_statetype : type is "000001 000010
000100 001000 010000 100000";
Synplify Pro 8.8 does not complain about it but Synopsys
design_compiler -xg mode 2007.03 does as shown below:
Information: Building the design 'prelaunch'. (HDL-193)
Error: prelaunch.vhd:37: The number of enum encodings given does not
match the number of literals. (ELAB-341)
*** Presto compilation terminated with 1 errors. ***
Warning: Unable to resolve reference 'prelaunch_pulse_gen' in
'decoder_asic'. (LINK-5)
1
Why are the tools different ? Is the error fatal, i.e. need a fix ?
Thanks,
Calvin