VHDL Source Code Formatter

Hi folks

I'm looking for a free or open-source "source code formatter" for
VHDL. The main requirement for me is tidying up of whitespace and
indentation, since I plan to apply it to the output of a VHDL generator
(written in XSL) which produces badly formatted VHDL.

I see there have peen some previous posts on this topic (going back to
1994) but no useful replies. Can anyone help?

Thanks in advance,
Richard

 

[Mike Treseler]

rnbrady@gmail.com wrote:

Hi folks

I'm looking for a free or open-source "source code formatter" for
VHDL. The main requirement for me is tidying up of whitespace and
indentation, since I plan to apply it to the output of a VHDL generator
(written in XSL) which produces badly formatted VHDL.

http://groups.google.com/group/comp.lang.vhdl/search?q=vhdl-mode+beautify

 

Thanks Mike, this helped.