vhdl:passing generic sized arrays to functions?

M

Morten Leikvoll

Guest
Im have different sizes of std_logic_vector arrays and want to run
functions on different array types where vector sizes are different (array
height is unconstrained).
Ive looked at subtypes, but cant find a solution. I think it stops because
an array doesnt seem to be able to be a subtype of a generic sized array.
Does anyone know how to do that?
 
"KJ" <kkjennings@sbcglobal.net> wrote in message
news:436c6b67-aeff-4121-a56a-f9a30f0b8669@a31g2000vbt.googlegroups.com...
On Aug 23, 8:45 am, "Morten Leikvoll" <mleik...@yahoo.nospam> wrote:
Im have different sizes of std_logic_vector arrays and want to run
functions on different array types where vector sizes are different
(array
height is unconstrained).
Ive looked at subtypes, but cant find a solution. I think it stops
because
an array doesnt seem to be able to be a subtype of a generic sized array.
Does anyone know how to do that?

I'm not quite sure if I understand what you're asking for, but
functions can work with unconstrained arrays. Inside the function,
one can then determine the bounds of the array with the usual array
attributes (i.e. 'low, 'high, 'range, etc.)
Example:
function foo(my_slv: std_logic_vector) return std_logic is
begin
for i in my_slv'range loop
...
end loop;
...

Does that help?
Not really but thanks for trying..Your function doesnt work with an array.
Ill try to explain better.. I have two array types:
type SLVAR1 is array(natural range <>) of std_logic_vector(10 downto 0);
type SLVAR2 is array(natural range <>) of std_logic_vector(5 downto 0);

I want to pass them both to the same function as generic array size, but
since they have different typenames, that is not possible.
Is there a way to define those arrays differently so that they can be passed
to a common function?
 
On Tue, 23 Aug 2011 14:45:18 +0200, "Morten Leikvoll"
<mleikvol@yahoo.nospam> wrote:

Im have different sizes of std_logic_vector arrays and want to run
functions on different array types where vector sizes are different (array
height is unconstrained).
Ive looked at subtypes, but cant find a solution. I think it stops because
an array doesnt seem to be able to be a subtype of a generic sized array.
Does anyone know how to do that?

That's a nice little resonance. "maxascent" was bothered
by exactly this in the recent thread "VHDL Basic Question".

True 2-dimensional arrays provide one possible way out,
although they will cost you some added trouble. See
my latest response in that thread for some sketch ideas.

If this is purely testbench code then there are things
you can do with access types to give the flexibility
you need (and, probably, more than you need). For
RTL synthesis... does anyone know the current level
of tool support for unconstrained element types in
aggregates? Generics on packages?
--
Jonathan Bromley
 
"Jonathan Bromley" <spam@oxfordbromley.plus.com> wrote in message
news:009757t25iqpq8vag34a0nrd7ibvv91nnr@4ax.com...
On Tue, 23 Aug 2011 14:45:18 +0200, "Morten Leikvoll"
mleikvol@yahoo.nospam> wrote:

Im have different sizes of std_logic_vector arrays and want to run
functions on different array types where vector sizes are different (array
height is unconstrained).
Ive looked at subtypes, but cant find a solution. I think it stops because
an array doesnt seem to be able to be a subtype of a generic sized array.
Does anyone know how to do that?

That's a nice little resonance. "maxascent" was bothered
by exactly this in the recent thread "VHDL Basic Question".
I read that thread but it appeared to be a different Q.
It doesnt look like the problem used different sized arrays and my first pri
here is to make this clean code. My only option now is to generate one
function for each size, wich is a bit awkward. For each size I could convert
types and call a more generic function, but I'd like to know if there is an
even more clean way to do it.
If arrays could be a subtype of another [unconstrained] array, I think it
would solve my problem, but I dont think it can?
 
On Aug 23, 8:45 am, "Morten Leikvoll" <mleik...@yahoo.nospam> wrote:
Im have different sizes of std_logic_vector arrays and  want to run
functions on different array types where vector sizes are different (array
height is unconstrained).
Ive looked at subtypes, but cant find a solution. I think it stops because
an array doesnt seem to be able to be a subtype of a generic sized array.
Does anyone know how to do that?
I'm not quite sure if I understand what you're asking for, but
functions can work with unconstrained arrays. Inside the function,
one can then determine the bounds of the array with the usual array
attributes (i.e. 'low, 'high, 'range, etc.)

Example:

function foo(my_slv: std_logic_vector) return std_logic is
begin
for i in my_slv'range loop
...
end loop;
....

Does that help?

Kevin Jennings
 
On Aug 23, 9:05 am, "Morten Leikvoll" <mleik...@yahoo.nospam> wrote:
"KJ" <kkjenni...@sbcglobal.net> wrote in message

news:436c6b67-aeff-4121-a56a-f9a30f0b8669@a31g2000vbt.googlegroups.com...





On Aug 23, 8:45 am, "Morten Leikvoll" <mleik...@yahoo.nospam> wrote:
Im have different sizes of std_logic_vector arrays and want to run
functions on different array types where vector sizes are different
(array
height is unconstrained).
Ive looked at subtypes, but cant find a solution. I think it stops
because
an array doesnt seem to be able to be a subtype of a generic sized array.
Does anyone know how to do that?
I'm not quite sure if I understand what you're asking for, but
functions can work with unconstrained arrays.  Inside the function,
one can then determine the bounds of the array with the usual array
attributes (i.e. 'low, 'high, 'range, etc.)
Example:
function foo(my_slv:  std_logic_vector) return std_logic is
begin
  for i in my_slv'range loop
     ...
  end loop;
...

Does that help?

Not really but thanks for trying..Your function doesnt work with an array..
Ill try to explain better.. I have two array types:
type SLVAR1 is array(natural range <>) of std_logic_vector(10 downto 0);
type SLVAR2 is array(natural range <>) of std_logic_vector(5 downto 0);

I want to pass them both to the same function as generic array size, but
since they have different typenames, that is not possible.
Is there a way to define those arrays differently so that they can be passed
to a common function?- Hide quoted text -
No, but there are a few ways around...

1. VHDL does allow function names to be overloaded so you can define
two functions with the same name, one that expects type SLVAR1, the
other that expects type SLVAR2.

2. Instead of using arrays of vectors, use a 2 dimensional array.
Doing this will likely mean that you need to create additional
functions to convert vectors into the appropriate row/column of the 2d
array.

Kevin Jennings
 

Welcome to EDABoard.com

Sponsor

Back
Top