vhdl generate related

[pavithrashinde@gmail.com]

how do i give a component portmap statement inside a generate
statement?
i need to instantiate a component n no. of times
the label is in the syntax so how i add that in the code?

 

[Mike Treseler]

pavithrashinde@gmail.com wrote:

how do i give a component portmap statement inside a generate
statement?

http://groups.google.com/groups?q=vhdl+generate+unique+label