VHDL code to schematic generator

P

pigeglad

Guest
Hello group



I'm reviewing a design with more than 170 VHDL files (2.4 MB), and I could
strongly benefit from a tool that can generate a schematic based on the VHDL
files.



Is there a program that can help me and can you perhaps recommend one?



Thanks in advanced



Jan
 
pigeglad wrote:

I'm reviewing a design with more than 170 VHDL files (2.4 MB), and I could
strongly benefit from a tool that can generate a schematic based on the VHDL
files.
Click to expand...
Consider reviewing the simulation testbench first.
That will tell you more about the design than
a graphic with hundreds of boxes and thousands
of wires.

If you have modelsim, take a look at
View, Dataflow once you have some waveforms up.

You can drag in a wave and get an extendable schematic view
of the processes in the neighborhood. You can even
watch the data values change as you move the
waveform cursor.

-- Mike Treseler
 
Mentor Graphics' "Renoir" can do this (although the drawings are
pretty ugly, imho). I think Renoir is now called "HDL Designer".

"pigeglad" <spam_account@business.tele.dk> wrote:

:Hello group
:
:
:
:I'm reviewing a design with more than 170 VHDL files (2.4 MB), and I could
:strongly benefit from a tool that can generate a schematic based on the VHDL
:files.
:
:
:
:Is there a program that can help me and can you perhaps recommend one?
:
:
:
:Thanks in advanced
:
:
:
:Jan
:
:
 
Since you guys are listing the possible tools, let me throw in
Cadence NC-Sim
@HDL @designer www.athdl.com
Novas tools

----------------------------------------------------------------------------
Ben Cohen Publisher, Trainer, Consultant (310) 721-4830
http://www.vhdlcohen.com/ vhdlcohen@aol.com
Author of following textbooks:
* Using PSL/SUGAR with Verilog and VHDL
Guide to Property Specification Language for ABV, 2003 isbn 0-9705394-4-4
* Real Chip Design and Verification Using Verilog and VHDL, 2002 isbn
0-9705394-2-8
* Component Design by Example ", 2001 isbn 0-9705394-0-1
* VHDL Coding Styles and Methodologies, 2nd Edition, 1999 isbn 0-7923-8474-1
* VHDL Answers to Frequently Asked Questions, 2nd Edition, isbn 0-7923-8115
------------------------------------------------------------------------------
 
And Aldec's Active-HDL www.aldec.com


"pigeglad" <spam_account@business.tele.dk> wrote in message
news:3fa9628d$0$27457$edfadb0f@dread16.news.tele.dk...
Hello group



I'm reviewing a design with more than 170 VHDL files (2.4 MB), and I could
strongly benefit from a tool that can generate a schematic based on the
VHDL
files.



Is there a program that can help me and can you perhaps recommend one?



Thanks in advanced



Jan
Click to expand...
 
"pigeglad" <spam_account@business.tele.dk> wrote in message
news:3fa9628d$0$27457$edfadb0f@dread16.news.tele.dk...
Hello group



I'm reviewing a design with more than 170 VHDL files (2.4 MB), and I
could
strongly benefit from a tool that can generate a schematic based on
the VHDL
files.



Is there a program that can help me and can you perhaps recommend
one?
Click to expand...
I can't recommend one, but I have heard of a tool called
"HDL Companion" recently, which claims to do what you describe.

Also I think Mentor's HDL Designer can do that.

regards

Alan



--
Alan Fitch
Consultant

DOULOS - Developing Design Know-how
VHDL * Verilog * SystemC * Perl * Tcl/Tk * Verification * Project
Services

Doulos Ltd. Church Hatch, 22 Market Place, Ringwood, Hampshire, BH24
1AW, UK
Tel: +44 (0)1425 471223 mail:
alan.fitch@doulos.com
Fax: +44 (0)1425 471573 Web:
http://www.doulos.com

The contents of this message may contain personal views which are not
the
views of Doulos Ltd., unless specifically stated.
 
"pigeglad" <spam_account@business.tele.dk> schreef in bericht
news:3fa9628d$0$27457$edfadb0f@dread16.news.tele.dk...
Hello group



I'm reviewing a design with more than 170 VHDL files (2.4 MB), and I could
strongly benefit from a tool that can generate a schematic based on the
VHDL
files.



Is there a program that can help me and can you perhaps recommend one?



Thanks in advanced



Jan



Try the Xilinx ISE webpack. I think this feature is included (it's in the
Click to expand...
commercial verion, i'm not sure about the Webpack)

Mark
 
You must log in or register to reply here.

Welcome to EDABoard.com

Sponsor

Back
Top