VHDL code in Latex

[Enes Erdin]

Hi,

Recently I am trying to put some VHDL codes in a report written by
Latex. Although I have found some information about how to do it I
could not apply it in the report. My aim is not to use the Verbatim
style, I want to write some piece of code and add caption to it. For
that purpose listing package seems to be the most suitable package for
doing it but it does not truly represent the code. I wonder how you
guys are doing such things. The page which I mostly used about this
was http://en.wikibooks.org/wiki/LaTeX/Packages/Listings and if you
are interested, I can also send my "wrong compiling" piece of writing.

Thanks in advance,

Enes.

 

[sleeman]

On Aug 1, 7:54 am, Enes Erdin <eneser...@gmail.com> wrote:

Hi,

Recently I am trying to put some VHDL codes in a report written by
Latex. Although I have found some information about how to do it I
could not apply it in the report. My aim is not to use the Verbatim
style, I want to write some piece of code and add caption to it. For
that purpose listing package seems to be the most suitable package for
doing it but it does not truly represent the code. I wonder how you
guys are doing such things. The page which I mostly used about this
washttp://en.wikibooks.org/wiki/LaTeX/Packages/Listingsand if you
are interested, I can also send my "wrong compiling" piece of writing.

Thanks in advance,

Enes.

I've always used verbatim mode... so thanks for the pointer to
listings! If this is a smallish piece of custom formatting I've
always been afraid to learn how to get Latex to do it. Instead, I just
postprocessed externally to eps (for example, highlighting in emacs
and using postscript-print-buffer), then pulled the eps into the LaTex
doc. Obviously, that won't work if you have a multi-page listing,
though.

What do you mean by "does not truly represent the code"? That the
highlighting isn't in the style that you want? Or that it's grossly
corrupted? You might also have more luck asking in a LaTex group than
a VHDL group.

- Kenn

 

[Mike Treseler]

Enes Erdin wrote:

Hi,

Recently I am trying to put some VHDL codes in a report written by
Latex. Although I have found some information about how to do it I
could not apply it in the report. My aim is not to use the Verbatim
style, I want to write some piece of code and add caption to it. For
that purpose listing package seems to be the most suitable package for
doing it but it does not truly represent the code.

If if the exact rendering is important,
crop and save a screenshot as mycode.png,
then include include it something like:

\includegraphics{mycode.png}


-- Mike Treseler

 

[Enes Erdin]

Thank you for the post,

sleeman <kennheinr...@sympatico.ca> wrote:

I just postprocessed externally to eps (for example, highlighting
in emacs and using postscript-print-buffer), then pulled the eps
into the LaTex doc.

This is a good idea. But what about the captions, do they appear as a
"figure" caption?

What do you mean by "does not truly represent the code"? That the
highlighting isn't in the style that you want? Or that it's grossly
corrupted?

The most annoying thing is, for example, I write

a <= b;
or
a := b;

in the output it appears for both of them as

a = b

highlighting is a luxury for me now

Thanks,

Enes.

 

[Petter Gustad]

Enes Erdin <eneserdin@gmail.com> writes:

style, I want to write some piece of code and add caption to it. For
that purpose listing package seems to be the most suitable package for

I usually use the listings package for this purpose:


\usepackage{listings}
\lstset{
language=VHDL,
basicstyle=\tiny\ttfamily}


\begin{lstlisting}
architecture rtl of whatever is
-- etc...

begin

-- etc...

end rtl;
\end{lstlisting}

What I like is the ability to grab a section from a file:

\begin{figure}[hf]
\lstinputlisting[first=13,last=21]{fft.vhd}
\caption{\label{fig:fftentity}Sample FFT Entity }
\end{figure}

This way you can keep your code valid and in sync with the document.

However, you have to keep track of the line numbers. In the past I've
added some comments in the file and used grep and friends to extract
this information, but it was not very elegant. It should be possible
to do it in a more elegant way from latex itself.

Then there's the lgrind package, but I don't know if there is a
lgrindef file for VHDL. I've used it with other languages, even though
it's quite some time ago.


Petter

--
A: Because it messes up the order in which people normally read text.
Q: Why is top-posting such a bad thing?
A: Top-posting.
Q: What is the most annoying thing on usenet and in e-mail?

 

[Marcus Harnisch]

Petter Gustad <newsmailcomp6@gustad.com> writes:

However, you have to keep track of the line numbers. In the past I've
added some comments in the file and used grep and friends to extract
this information, but it was not very elegant. It should be possible
to do it in a more elegant way from latex itself.

You mean like the method described in section 5.7 of the listings
documentation? It needs some work, but it is a proof of concept. To
bad that Brooks doesn't seem to be working on this any more. I sent
him a patch two years ago (SystemVerilog and Verilog 2005 support)
that hasn't been included, yet.

Regards
Marcus


--
note that "property" can also be used as syntaxtic sugar to reference
a property, breaking the clean design of verilog; [...]

(seen on http://www.veripool.com/verilog-mode_news.html)

 

[Petter Gustad]

Marcus Harnisch <marcus.harnisch@gmx.net> writes:

You mean like the method described in section 5.7 of the listings
documentation? It needs some work, but it is a proof of concept. To

I was not aware of this feature. Either it's a later addition, or I've
completely missed it when I first looked at the listings package long
time ago. Thank you for making me aware of it.

Petter
--
A: Because it messes up the order in which people normally read text.
Q: Why is top-posting such a bad thing?
A: Top-posting.
Q: What is the most annoying thing on usenet and in e-mail?