Vgs nmos turn on voltage

[panfilero]

let's say I have this nmos

http://www.fairchildsemi.com/ds/FQ/FQD10N20C.pdf

it says the Vgs,th is between 2V-4V

I believe the higher drive voltage will reduce my Rds,on.... so.... do
I just want to drive this as high as makes sense for my circuit? this
fet has a Vgs max of 30V.... and a Vgs,th of 2V-4V... how do you
figure what to drive it at? I would just do 10V and move on but I'm
wondering what a more thoughtful approach might be

thanks

 

[Jim Thompson]

On Thu, 5 Apr 2012 10:47:02 -0700 (PDT), panfilero
<panfilero@gmail.com> wrote:

let's say I have this nmos

http://www.fairchildsemi.com/ds/FQ/FQD10N20C.pdf

it says the Vgs,th is between 2V-4V

I believe the higher drive voltage will reduce my Rds,on.... so.... do
I just want to drive this as high as makes sense for my circuit? this
fet has a Vgs max of 30V.... and a Vgs,th of 2V-4V... how do you
figure what to drive it at? I would just do 10V and move on but I'm
wondering what a more thoughtful approach might be

thanks

From Figure 1, VGS > ~5.5V has very little improvement in Rds_on

How serious are your needs for low Rds_on?

...Jim Thompson
--
| James E.Thompson, CTO | mens |
| Analog Innovations, Inc. | et |
| Analog/Mixed-Signal ASIC's and Discrete Systems | manus |
| Phoenix, Arizona 85048 Skype: Contacts Only | |
| Voice480)460-2350 Fax: Available upon request | Brass Rat |
| E-mail Icon at http://www.analog-innovations.com | 1962 |

I love to cook with wine. Sometimes I even put it in the food.

 

[Jim Thompson]

On Thu, 5 Apr 2012 12:32:42 -0700 (PDT), panfilero
<panfilero@gmail.com> wrote:

On Apr 5, 12:58 pm, Jim Thompson <To-Email-Use-The-Envelope-I...@On-My-
Web-Site.com> wrote:
On Thu, 5 Apr 2012 10:47:02 -0700 (PDT), panfilero

panfil...@gmail.com> wrote:
let's say I have this nmos

http://www.fairchildsemi.com/ds/FQ/FQD10N20C.pdf

it says the Vgs,th is between 2V-4V

I believe the higher drive voltage will reduce my Rds,on.... so.... do
I just want to drive this as high as makes sense for my circuit? this
fet has a Vgs max of 30V.... and a Vgs,th of 2V-4V... how do you
figure what to drive it at? I would just do 10V and move on but I'm
wondering what a more thoughtful approach might be

thanks

From Figure 1, VGS > ~5.5V has very little improvement in Rds_on

How serious are your needs for low Rds_on?

                                        ...Jim Thompson
[snip]

not very serious more just trying to understand does it matter how
high I go with my Vgs? 12V better than 9V ? that kinda thing

Depends on your definition of "better" ;-)

Minimal improvement in Rds_on. More gate swing, if done at a high
rate equals more drive power consumed.

...Jim Thompson
--
| James E.Thompson, CTO | mens |
| Analog Innovations, Inc. | et |
| Analog/Mixed-Signal ASIC's and Discrete Systems | manus |
| Phoenix, Arizona 85048 Skype: Contacts Only | |
| Voice480)460-2350 Fax: Available upon request | Brass Rat |
| E-mail Icon at http://www.analog-innovations.com | 1962 |

I love to cook with wine. Sometimes I even put it in the food.

 

[Jamie]

panfilero wrote:

let's say I have this nmos

http://www.fairchildsemi.com/ds/FQ/FQD10N20C.pdf

it says the Vgs,th is between 2V-4V

I believe the higher drive voltage will reduce my Rds,on.... so.... do
I just want to drive this as high as makes sense for my circuit? this
fet has a Vgs max of 30V.... and a Vgs,th of 2V-4V... how do you
figure what to drive it at? I would just do 10V and move on but I'm
wondering what a more thoughtful approach might be

thanks
Those are the range of what to expect from lot to lot and condition

of operations. If you're using this as a switch, I'd be well above
the MAX Vgs(Thr) voltage to turn it on. Also, gate charge and your
driving device has a lot to do with it so to not hover to long over
the threshold point, otherwise, this can cause heating of the FET due
to it being in the linear region for too long.

That part there is best used in a 5v or more logic switch signal, I
don't think it would be a good idea to use that in a 3.3V logic level
system, unless of course, you plan on using a gate driver with a charge
pump in it.

Jamie

 

[panfilero]

On Apr 5, 12:58 pm, Jim Thompson <To-Email-Use-The-Envelope-I...@On-My-
Web-Site.com> wrote:

On Thu, 5 Apr 2012 10:47:02 -0700 (PDT), panfilero

panfil...@gmail.com> wrote:
let's say I have this nmos

http://www.fairchildsemi.com/ds/FQ/FQD10N20C.pdf

it says the Vgs,th is between 2V-4V

I believe the higher drive voltage will reduce my Rds,on.... so.... do
I just want to drive this as high as makes sense for my circuit? this
fet has a Vgs max of 30V.... and a Vgs,th of 2V-4V... how do you
figure what to drive it at? I would just do 10V and move on but I'm
wondering what a more thoughtful approach might be

thanks

From Figure 1, VGS > ~5.5V has very little improvement in Rds_on

How serious are your needs for low Rds_on?

                                        ...Jim Thompson
--
| James E.Thompson, CTO                            |    mens     |
| Analog Innovations, Inc.                         |     et      |
| Analog/Mixed-Signal ASIC's and Discrete Systems  |    manus    |
| Phoenix, Arizona  85048    Skype: Contacts Only  |             |
| Voice480)460-2350  Fax: Available upon request |  Brass Rat  |
| E-mail Icon athttp://www.analog-innovations.com|    1962     |

I love to cook with wine.     Sometimes I even put it in the food.

not very serious more just trying to understand does it matter how
high I go with my Vgs? 12V better than 9V ? that kinda thing

 

[John Fields]

On Thu, 5 Apr 2012 10:47:02 -0700 (PDT), panfilero
<panfilero@gmail.com> wrote:

let's say I have this nmos

http://www.fairchildsemi.com/ds/FQ/FQD10N20C.pdf

it says the Vgs,th is between 2V-4V

I believe the higher drive voltage will reduce my Rds,on.... so.... do
I just want to drive this as high as makes sense for my circuit? this
fet has a Vgs max of 30V.... and a Vgs,th of 2V-4V... how do you
figure what to drive it at? I would just do 10V and move on but I'm
wondering what a more thoughtful approach might be

---
From the data sheet's "On Characteristics", Vgs(th) - the gate
threshold voltage - is defined as that voltage which, when applied
across the drain and source, with the gate and drain tied together,
will cause 250 microamperes of current to flow through the MOSFET.

That voltage is specified as being anywhere between 2 and 4 volts, and
is the voltage required to get the MOSFET to just start to turn on
with 2-4 volts across it and the gate and drain shorted.


More meaningful with respect to your drive voltage question is the
Rds(on) spec, which states that with 10 volts between the gate and the
source and 3.9 amperes of drain current, the drain-to-source
resistance will be a maximum 0f 360 milliohms ohms.

That's just a single point, of course, but it serves to state that
with 10 volts between the gate and the source, the resistance between
the drain and the source will be at its minimum.

Study figures 1,2, and 3 on the data sheet in order to get a better
feel for what happens with other gate voltages and drain currents.

Just as an aside, the active silicon area between the drain and the
source is called the "channel", and when a small increase in gate
voltage no longer elicits a correspondingly small decrease in the
channel resistance, it's said to be "fully enhanced".

For most MOSFETS, the channel will be fully enhanced at somewhat less
than 10V, but for "logic-level" devices that voltage will be somewhat
less than 5V.

--
JF