P
Pratap
Guest
Hi all,
I need to build an ASIC synthesizable fixed point 32x32 multiplier and
fixed point 32/32 divider with very less hardware resource for my
design.Speed is not at all a matter for me.
I can space 100s of cycles for my computaions.
Can anybody help me with the code (preferably in VHDL) or suitable
references?
Thanks,
Pratap
I need to build an ASIC synthesizable fixed point 32x32 multiplier and
fixed point 32/32 divider with very less hardware resource for my
design.Speed is not at all a matter for me.
I can space 100s of cycles for my computaions.
Can anybody help me with the code (preferably in VHDL) or suitable
references?
Thanks,
Pratap