Guest
Hi all,
Is there any free tool out there to convert .v verilog source file to
schematic diagram? May be a schematic diagram in populate file format
(i.e. to be extracted from PSpice, Electronic Workbench or Microcap
format) for further electonic analysis? Or is there free tool out
there to convert directly from .v verilog source to PCB layout?
What's a good & free verilog visual simulator?
Thanks all,
Jimmy
Is there any free tool out there to convert .v verilog source file to
schematic diagram? May be a schematic diagram in populate file format
(i.e. to be extracted from PSpice, Electronic Workbench or Microcap
format) for further electonic analysis? Or is there free tool out
there to convert directly from .v verilog source to PCB layout?
What's a good & free verilog visual simulator?
Thanks all,
Jimmy