verilog source code/ fsm for "divide by n counter"

[S45]

Hello,

I am looking for verilog source code/ fsm for "divide by n counter "(I
did google search and I was not able to get the right links). Can
anybody please help me?

Thanks

 

[John_H]

S45 wrote:

Hello,

I am looking for verilog source code/ fsm for "divide by n counter "(I
did google search and I was not able to get the right links). Can
anybody please help me?

Thanks

You might as well be asking "how do I write a paragraph?"

Your search is for such an extremely basic piece of code that the first
method should be obvious to anyone who has the slightest idea about what
hardware design entails.

Instantiate a counter.
Starting from 1, count to n.
When the value is n, output your signal and reload the counter with 1.

Is this so hard?

There are other twists that can give you the same result. You can start
at 0 and count to n-1. You can start at n-2 and count down; whenever
the count is negative, you have your synchronous output and a reload.
You can start from 1-n and count up; whenever the count is positive, you
have your /n output and a reload.

Ask yourself why you're coming here for your extremely basic questions.
Is your university not equipped to help you learn simple electronic
design concepts? Do you not have graduate assistants that help
underclassmen understand what they don't get from class? You say you've
googled; have you read your texts?

 

[Mike Treseler]

S45 wrote:

I am looking for verilog source code/ fsm for "divide by n counter "

Here's a related example:
http://home.comcast.net/~mike_treseler/div10.v

-- Mike Treseler