Verilog Reader/Parser

[Henry]

Ladies and Gents

I need help. I need to quickly develop an EDA tool that reads a
verilog RTL, translates it to some other verilog RTL and eventually
writes it.

Could you please suggest if there are any free readers/parsers
available to use (C/C++ source, Perl or even some library). It would
be just great if a parser could build some structure (a VPI tree for
example)...

Any suggestions?

Thank you

 

[Ira Baxter]

"Henry" <grishashvili@yahoo.com> wrote in message
news:67041aa6.0411121615.7abe20bc@posting.google.com...

I need help. I need to quickly develop an EDA tool that reads a
verilog RTL, translates it to some other verilog RTL and eventually
writes it.

Could you please suggest if there are any free readers/parsers
available to use (C/C++ source, Perl or even some library). It would
be just great if a parser could build some structure (a VPI tree for
example)...

Any suggestions?

Not free. But, a full Verilog 2001 parser that builds a full tree.

See http://www.semdesigns.com/Products/FrontEnds/index.html


--
Ira D. Baxter, Ph.D., CTO 512-250-1018
Semantic Designs, Inc. www.semdesigns.com

 

[Srinivasan Venkataramanan]

Hi,
Try looking at Icarus source code, http://www.icarus.com

HTH,
Srinivasan

"Henry" <grishashvili@yahoo.com> wrote in message
news:67041aa6.0411121615.7abe20bc@posting.google.com...

Ladies and Gents

I need help. I need to quickly develop an EDA tool that reads a
verilog RTL, translates it to some other verilog RTL and eventually
writes it.

Could you please suggest if there are any free readers/parsers
available to use (C/C++ source, Perl or even some library). It would
be just great if a parser could build some structure (a VPI tree for
example)...

Any suggestions?

Thank you

 

[Petter Gustad]

Mohammad Musa <mohammad.musa@xilinx.com> writes:

You could build your own parser and scanner using Flex and Bison.
Icarus verilog uses them to scan and parse the language. You could
come up with a tree that suits your application better than the
standard structures generated by other parsers. Good Luck!!

I have made a couple Verilog parsers and I found PCCTS and ANTLR much
more intiutive and flexible than lex/yacc. There is a Verilog grammar
at:

http://www.antlr.org/grammar/verilog/verilog.g

Petter
--
A: Because it messes up the order in which people normally read text.
Q: Why is top-posting such a bad thing?
A: Top-posting.
Q: What is the most annoying thing on usenet and in e-mail?

 

[Allan Herriman]

On 16 Nov 2004 23:13:25 +0100, Petter Gustad
<newsmailcomp6@gustad.com> wrote:

Mohammad Musa <mohammad.musa@xilinx.com> writes:

You could build your own parser and scanner using Flex and Bison.
Icarus verilog uses them to scan and parse the language. You could
come up with a tree that suits your application better than the
standard structures generated by other parsers. Good Luck!!

I have made a couple Verilog parsers and I found PCCTS and ANTLR much
more intiutive and flexible than lex/yacc. There is a Verilog grammar
at:

http://www.antlr.org/grammar/verilog/verilog.g

It only seems to support a subset of the language though.
(localparam, generate, etc. aren't in that file)

Regards,
Allan

 

[Petter Gustad]

Allan Herriman <allan.herriman.hates.spam@ctam.com.au.invalid> writes:

On 16 Nov 2004 23:13:25 +0100, Petter Gustad
newsmailcomp6@gustad.com> wrote:

Mohammad Musa <mohammad.musa@xilinx.com> writes:

You could build your own parser and scanner using Flex and Bison.
Icarus verilog uses them to scan and parse the language. You could
come up with a tree that suits your application better than the
standard structures generated by other parsers. Good Luck!!

I have made a couple Verilog parsers and I found PCCTS and ANTLR much
more intiutive and flexible than lex/yacc. There is a Verilog grammar
at:

http://www.antlr.org/grammar/verilog/verilog.g

It only seems to support a subset of the language though.
(localparam, generate, etc. aren't in that file)

If you look at the date you will see that it's from 2000, hence
Verilog 2001 syntax will not be present. I haven't used this grammar
myself (I wrote my own), but it should not be too complicated to
extend it to include the missing productions.

Too bad the standard does not include a machine readable (and
executable) grammar description.

Petter

--
A: Because it messes up the order in which people normally read text.
Q: Why is top-posting such a bad thing?
A: Top-posting.
Q: What is the most annoying thing on usenet and in e-mail?

 

[Mohammad Musa]

You could build your own parser and scanner using Flex and Bison. Icarus
verilog uses them to scan and parse the language. You could come up with
a tree that suits your application better than the standard structures
generated by other parsers. Good Luck!!

Henry wrote:

Ladies and Gents

I need help. I need to quickly develop an EDA tool that reads a
verilog RTL, translates it to some other verilog RTL and eventually
writes it.

Could you please suggest if there are any free readers/parsers
available to use (C/C++ source, Perl or even some library). It would
be just great if a parser could build some structure (a VPI tree for
example)...

Any suggestions?

Thank you

--
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