Verilog! How to work with modules?

[beginner]

Hello!
1.sorry for my poor english
2.i have the following diagram to implement in verilog: http://elf.cs.pub.ro/ac/wiki/_media/teme/tema2/tema_2_top_module_instance.png
I want to make an synchronous sequential circuit that processes grayscale images.
a)make a blur filter b)make 90 degree rotation c)horizontal flip
I have searched and found algorithm that i will use.
I do not know how to access image module from process module?

My code look like this:
module process(
input clk,
input [1:0] op,
input [7:0] in_pix,
output [5:0] in_row, in_col,
output [5:0] out_row, out_col,
output out_we,
output [7:0] out_pix,
output done
);

always @(posedge clk) begin
if(op==0)begin
//here i will implement blur algorithm
end else if(op==1)begin
//here i will implement fliping algorithm
end else begin
//here i will implement rotation algorithm
//I do not know how to access elements of image module!??
//I want to extract elements from the matrix so i can rotate the matrix and //create new rotated matrix??
end
end
endmodule

module image(
input clk,
input[5:0] row,
input[5:0] col,
input we,
input[7:0] in,
output[7:0] out
);

reg[7:0] data[63:0][63:0];
assign out = data[row][col];
always @(posedge clk) begin
if(we)
data[row][col] <= in;
end
endmodule