Verilog Header files

[Paulo Dutra]

Are Verilog Header (.vh) files are a feature of Verilog-2001?
Do tools recognize .vh files and treat them differently from .v files?
Or, is the concept of .vh files just for design management purposes?
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[Steven Sharp]

Paulo Dutra <paulo@xilinx.com> wrote in message news:<3F999002.547E8D99@xilinx.com>...

Are Verilog Header (.vh) files are a feature of Verilog-2001?
Do tools recognize .vh files and treat them differently from .v files?
Or, is the concept of .vh files just for design management purposes?

Verilog doesn't care what you call your files. There is no special
meaning to an ending of .vh or .v or .xyz or no ending at all. It
just compiles the files you tell it to, and `includes the files you
tell it to, no matter what their names are. The use of endings is
just something humans do for their own convenience.