Verilog FPGA synthesis

[Brandon Atkinson]

Hello all,

I am looking for good resources on synthesizing FPGA loads from RTL (preferably Verilog, but whatever). Does anyone know of any good books, sites, articles that might fit this description. I am new to designing for FPGA.

Thanks,
Brandon

 

[Prasanna]

Brandon Atkinson <brandona@maine.rr.com> wrote in message news:<20030724234742.4b9a38b4.brandona@maine.rr.com>...

Hello all,

I am looking for good resources on synthesizing FPGA loads from RTL (preferably Verilog, but whatever). Does anyone know of any good books, sites, articles that might fit this description. I am new to designing for FPGA.

Thanks,
Brandon

Try this if you have not already...

http://www01.edatoolscafe.com/books/ASIC/Top/msmith.php

This book discusses most FPGA popular vendors.

Most FPGA EDA tools are very specific to the FPGA vendors. It would be
beneficial to learn architecture of FPGA to learn how your code would
land up after synthesis.

- Prasanna