Verilog book

[Kenneth Brun Nielsen]

I have to make a Verilog model of complete (working design). Can you
recommend a book for reference.

I know VHDL, so I know the "possibilities". I just want a book, where
I can read a few chapters for basic syntax and then use the rest of it
as a reference when needed.

Any ideas?

Best regards,
Kenneth

 

[Jonathan Bromley]

On Tue, 19 May 2009 05:31:29 -0700 (PDT), Kenneth Brun Nielsen wrote:

I have to make a Verilog model of complete (working design). Can you
recommend a book for reference.

I know VHDL, so I know the "possibilities". I just want a book, where
I can read a few chapters for basic syntax and then use the rest of it
as a reference when needed.

If you can lay hands on a copy of "HDL Chip Design" by Doug Smith
(now out of print) then do so; it has parallel VHDL/Verilog examples.
Otherwise you could use any of the standard texts - Palnitkar,
Thomas&Moorby, ..... - or, if you're confident you know what you
are doing and just need a syntax reference, buy a Golden Reference
Guide from our website (sorry for the advert, folks):
http://www.doulos.com/content/products/golden_reference_guides.php

There are plenty of bilingual VHDL/Verilog folks here, so
posting an occasional question will do no harm either.
I don't think anyone has ever yet been deported to the colonies
for the heinous crime of writing VHDL code in a c.l.verilog post!
--
Jonathan Bromley, Consultant

DOULOS - Developing Design Know-how
VHDL * Verilog * SystemC * e * Perl * Tcl/Tk * Project Services

Doulos Ltd., 22 Market Place, Ringwood, BH24 1AW, UK
jonathan.bromley@MYCOMPANY.com
http://www.MYCOMPANY.com

The contents of this message may contain personal views which
are not the views of Doulos Ltd., unless specifically stated.

 

[Mike Treseler]

Kenneth Brun Nielsen wrote:

I have to make a Verilog model of complete (working design). Can you
recommend a book for reference.

I know VHDL, so I know the "possibilities". I just want a book, where
I can read a few chapters for basic syntax and then use the rest of it
as a reference when needed.
Any ideas?

Seen these?
http://www.vhdl.org/rassp/vhdl/guidelines/vhdlqrc.pdf
http://www.vhdl.org/rassp/vhdl/guidelines/1164qrc.pdf
http://www.google.com/search?q=botros+isbn+1584508558

 

[Mike Treseler]

Mike Treseler wrote:

Seen these?
http://www.vhdl.org/rassp/vhdl/guidelines/vhdlqrc.pdf
http://www.vhdl.org/rassp/vhdl/guidelines/1164qrc.pdf
Sorry, those are vhdl.

http://www.google.com/search?q=botros+isbn+1584508558
This one has bilingual synthesis examples.

-- Mike Treseler

 

[Jonathan Bromley]

On Tue, 19 May 2009 09:38:26 -0700, Mike Treseler wrote:

http://www.google.com/search?q=botros+isbn+1584508558
This one has bilingual synthesis examples.

Interesting - that's a new one for me. Do you like it?

--
Jonathan Bromley, Consultant

DOULOS - Developing Design Know-how
VHDL * Verilog * SystemC * e * Perl * Tcl/Tk * Project Services

Doulos Ltd., 22 Market Place, Ringwood, BH24 1AW, UK
jonathan.bromley@MYCOMPANY.com
http://www.MYCOMPANY.com

The contents of this message may contain personal views which
are not the views of Doulos Ltd., unless specifically stated.

 

[Mike Treseler]

Jonathan Bromley wrote:

On Tue, 19 May 2009 09:38:26 -0700, Mike Treseler wrote:

http://www.google.com/search?q=botros+isbn+1584508558
This one has bilingual synthesis examples.

Interesting - that's a new one for me. Do you like it?

It's the only book of side by side vhdl|verilog examples in print.
But that is all it is, simple synthesis examples and a short
explanation. No language reference or simulation.
But it's a quick way for a vhdl guy to get started
on verilog synthesis, and the price is right.

-- Mike Treseler