Verilog Benchmarks - Needed

[Peter Jamieson]

As it is my first time to comp.lang.verilog I will briefly mention that
I'm working on a front-end verilog compiler that targets both academic
FPGAs as well as Altera's Quartus Flow.

I am at a point where I need benchmarks. I have searched the web as well
as www.opencores.org, but I need more. The main aspect of the benchmark
which would be most useful is both size (actual transistor size) and the
existance of multipliers in the design.

Thanks,
Peter Jamieson
PhD. Candidate at the University of Toronto

 

[Steve Meyer]

You can get the John Hillawi's DA Solutions Verilog simulator
comparison benchmarks from mid 1990s at our web site.
URL: www.pragmatic-c.com. Click on the link to the DA Solutions
benchmarks in the "what's new" section on the left.
/Steve

On Thu, 8 Jan 2004 21:32:11 GMT, Peter Jamieson
<jamieson@eecg.utoronto.ca> wrote:

As it is my first time to comp.lang.verilog I will briefly mention that
I'm working on a front-end verilog compiler that targets both academic
FPGAs as well as Altera's Quartus Flow.

I am at a point where I need benchmarks. I have searched the web as well
as www.opencores.org, but I need more. The main aspect of the benchmark
which would be most useful is both size (actual transistor size) and the
existance of multipliers in the design.

Thanks,
Peter Jamieson
PhD. Candidate at the University of Toronto

--
Steve Meyer Phone: (612) 371-2023
Pragmatic C Software Corp. email: sjmeyer@pragmatic-c.com
520 Marquette Ave. So., Suite 900
Minneapolis, MN 55402