S
spectrallypure
Guest
Hi all! I am implementing a compact MOS model in Verilog-A (for use within virtuoso), and I need to figure out how can I make my model read the parameters from a text file. I can't have them hardcoded in the compact model code, since I need to use the model for devices with different model parameters (that's also why using an "`include" directive in the model code wouldn't solve the problem).
I have already coded my model and created a cell with veriloga and symbol views, and it simulates fine in ADE (with hardcoded model and instance values, though). I noticed that all the parameters defined in the .va code appear as CDF component parameters in the cell, and in fact they are even editable in the schematic viewer for each MOS instance. Unfortunately, this approach is not practical to change the model parameters for each instance (they are too many!). Thus I need a way to rather specify a model name for each instance, and then make my verilog-A read the parameters for that model from a file.
Thanks in advance for any clues on how to achieve this!
Regards,
Jorge.
P.S. Notice that I need the simulator to use my .va code for simulating the MOS, and not to just instantiate a MOS primitive for using a Spice-like model, as described in https://groups.google.com/forum/#!searchin/comp.cad.cadence/verilog-A$20model$20parameters/comp.cad.cadence/5OKf-HG5PlU/oHYwqslgzP4J
I have already coded my model and created a cell with veriloga and symbol views, and it simulates fine in ADE (with hardcoded model and instance values, though). I noticed that all the parameters defined in the .va code appear as CDF component parameters in the cell, and in fact they are even editable in the schematic viewer for each MOS instance. Unfortunately, this approach is not practical to change the model parameters for each instance (they are too many!). Thus I need a way to rather specify a model name for each instance, and then make my verilog-A read the parameters for that model from a file.
Thanks in advance for any clues on how to achieve this!
Regards,
Jorge.
P.S. Notice that I need the simulator to use my .va code for simulating the MOS, and not to just instantiate a MOS primitive for using a Spice-like model, as described in https://groups.google.com/forum/#!searchin/comp.cad.cadence/verilog-A$20model$20parameters/comp.cad.cadence/5OKf-HG5PlU/oHYwqslgzP4J