verification vs validation

[pradeep]

Hi,

can any one give the difference between verification and validation ?

what is system level validation ?

what is emulation ?

with regards
pradeep.g

 

[Narendran Kumaraguru Nath]

Hi,
In my understanding....
Verification means checking the functionality w.r. to the spec. of the
module / system. Or in other words wether the system behaves as it
supposed to.
Validation is checking wether the part/module confines to its
requirements w.r. to its application (speed, power, throughput, etc).
HTH,
~naren.


pradeepg@vlsi1.sastra.edu (pradeep) wrote in message news:<962c2d3.0311201953.14cb71c8@posting.google.com>...

Hi,

can any one give the difference between verification and validation ?

what is system level validation ?

what is emulation ?

with regards
pradeep.g

 

[Narendran Kumaraguru Nath]

Forgot emulation...

The term emulation is used by the test team to denote the test logic
and the magic they can do to the device during test (changing the
configurations, exporting some signals to top level, controling some
internal nodes).

It is also used by the validation engineers working on QT (Quick Turn)
to denote the process used by QT.

~naren.

narenkumaraguru@yahoo.co.uk (Narendran Kumaraguru Nathan) wrote in message news:<f2914350.0311250626.408aa108@posting.google.com>...

Hi,
In my understanding....
Verification means checking the functionality w.r. to the spec. of the
module / system. Or in other words wether the system behaves as it
supposed to.
Validation is checking wether the part/module confines to its
requirements w.r. to its application (speed, power, throughput, etc).
HTH,
~naren.


pradeepg@vlsi1.sastra.edu (pradeep) wrote in message news:<962c2d3.0311201953.14cb71c8@posting.google.com>...
Hi,

can any one give the difference between verification and validation ?

what is system level validation ?

what is emulation ?

with regards
pradeep.g

 

[Jason Doege]

Hi Pradeep,

Personally, I use the term "validation" to mean checking to see if the
design does what you want it to do. I reserve the term "verification" to
mean checking to see if two presumably equivalent descriptions are infact
equivalent. For instance, testing a design against a specification is a
validation process. Checking a post-synthesis netlist to see if it behaves
the same as the RTL description is a verification process. Another way of
putting this is that "validation" checks to see if what the designers
designed is correct. "verification" checks to see if the various
implementation steps caused a difference from what the designers designed.

System level validation is the act of ensuring your design works in
"mission mode", usually surrounded by actual system-type modules as opposed
to in a synthetic test-bench. System level validation can take place at many
abstract levels and also with real, implemented designs.

Emulation generally refers to some "thing" other than a simulator
pretending to be the design. Typically, emulation extends to electrically
connecting to a target system. Usually the term is "hardware emulation" to
clear things up, implying that the design is being emulated by a special
piece of hardare, such as a massive cluster of FPGAs, rather than a software
based simulator.

Best regards,
Jason Doege
Note, remove the obviously erroneous '.'s from my email address to respond.


"Narendran Kumaraguru Nathan" <narenkumaraguru@yahoo.co.uk> wrote in message
news:f2914350.0311250626.408aa108@posting.google.com...

Hi,
In my understanding....
Verification means checking the functionality w.r. to the spec. of the
module / system. Or in other words wether the system behaves as it
supposed to.
Validation is checking wether the part/module confines to its
requirements w.r. to its application (speed, power, throughput, etc).
HTH,
~naren.


pradeepg@vlsi1.sastra.edu (pradeep) wrote in message
news:<962c2d3.0311201953.14cb71c8@posting.google.com>...
Hi,

can any one give the difference between verification and validation ?

what is system level validation ?

what is emulation ?

with regards
pradeep.g