Vera variable/public method access

[a2zasics]

Hi,

I have some basic VERA questions -

o Can a testbench have multiple vera modules. In that case do we create multiple
vshells. how ?

o Can an interface have multiple clocks ?

o I can access hdl_task and hdl_node, but how do i access another class public
methods from outside that class. Simply put, is there a way to do the hdl_task
equivalent in vera code, which can access methods across whole heirarchy of vera.

Thankfully,
Shardendu

 

[Alexander Gnusin]

shardendu@verizon.net (a2zasics) wrote in message news:<1c97c9ba.0312262205.7745ad50@posting.google.com>...

Hi,

I have some basic VERA questions -

o Can a testbench have multiple vera modules. In that case do we create multiple
vshells. how ?

No, TestBench must have only 1 vshell.

o Can an interface have multiple clocks ?

Yes. You may define multiple interfaces and specify different sampling
clocks for each one of them.

o I can access hdl_task and hdl_node, but how do i access another class public
methods from outside that class. Simply put, is there a way to do the hdl_task
equivalent in vera code, which can access methods across whole heirarchy of vera.

Class are like modules in verilog, and objects - like module
instantiations. In HDL domain, task may be accessed through hierarchy
of instances, such as: top.my_model.my_task.
In Vera domain, method may be accessed the same way, through the
objects (not classes!) hierarchy.

Thankfully,
Shardendu

Regards,
Alexander